d60df3d0d5
This commit changes the value of the `arch` from `riscv64` to `riscv`, so that it is in line with the rest of the RISC-V boards. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
10 lines
140 B
YAML
10 lines
140 B
YAML
identifier: visionfive2
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name: Visionfive JH7110 (NON-SMP)
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type: mcu
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arch: riscv
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toolchain:
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- zephyr
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- cross-compile
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supported:
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- uart
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