cce530cae4
Some architectures such as RISC-v support more than 255 interrupts per aggrigator. This diff adds the ability to forgo the aggrigator pattern and use a configurable number of bits for multilevel interruts. Signed-off-by: Joshua Lilly <jgl@meta.com> |
||
|---|---|---|
| .. | ||
| boards | ||
| src | ||
| CMakeLists.txt | ||
| prj.conf | ||
| testcase.yaml | ||