..
c0
dts: arm: st: c0: Add dma and dmamux nodes
2023-05-27 06:21:39 -04:00
f0
drivers: can: stm32: bxcan: rename driver to match reference manuals
2023-08-16 13:03:00 +02:00
f1
drivers: can: stm32: bxcan: rename driver to match reference manuals
2023-08-16 13:03:00 +02:00
f2
dts: arm: st: set adc clock source for stm32f2, f4, f7, l1, u5 and wba
2023-08-29 11:27:07 +01:00
f3
drivers: can: stm32: bxcan: rename driver to match reference manuals
2023-08-16 13:03:00 +02:00
f4
dts: arm: st: set adc clock source for stm32f2, f4, f7, l1, u5 and wba
2023-08-29 11:27:07 +01:00
f7
soc: arm: Device tree refactor and support for stm32f765xx
2023-08-31 10:21:25 +02:00
g0
dts: arm: st: rename STM32 FDCAN devicetree node labels
2023-08-16 13:03:00 +02:00
g4
dts: arm: st: rename STM32 FDCAN devicetree node labels
2023-08-16 13:03:00 +02:00
h5
dts: arm: st: rename STM32 FDCAN devicetree node labels
2023-08-16 13:03:00 +02:00
h7
dts: arm: st: rename STM32H7 FDCAN devicetree node labels
2023-08-16 13:03:00 +02:00
l0
pm: power-states node needs to be a child of cpus
2023-07-25 09:16:14 +02:00
l1
dts: arm: st: set adc clock source for stm32f2, f4, f7, l1, u5 and wba
2023-08-29 11:27:07 +01:00
l4
drivers: can: stm32: bxcan: rename driver to match reference manuals
2023-08-16 13:03:00 +02:00
l5
dts: arm: st: move cpu-power-states to SoC dts files
2023-07-26 16:49:00 +02:00
mp1
dts: arm: st: mp1: add timers5
2023-07-06 09:44:01 +00:00
u5
dts: arm: st: set adc clock source for stm32f2, f4, f7, l1, u5 and wba
2023-08-29 11:27:07 +01:00
wb
dts: arm: st: move cpu-power-states to SoC dts files
2023-07-26 16:49:00 +02:00
wba
dts: arm: st: set adc clock source for stm32f2, f4, f7, l1, u5 and wba
2023-08-29 11:27:07 +01:00
wl
pm: power-states node needs to be a child of cpus
2023-07-25 09:16:14 +02:00