IBEN EL HADJ MESSAOUD Marwa 9b14f9b924 drivers: usb: Enable USB and UDC OTGPHY clock ... - Reset specific configuration bits in USB1_HS_PHYC->USBPHYC_CR before setting new values. - Set the Frequency Selection (FSEL) bits to operate the USB PHY Control Register at 24 MHz for proper communication. - Enable the OTGPHY1 peripheral clock using LL_AHB5_GRP1_EnableClock. Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>		2025-05-28 10:04:40 +02:00
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bc12
common	drivers: udc_dwc2: Optimize endpoint interrupt handling	2025-05-20 12:47:34 +02:00
device	drivers: usb: Enable USB and UDC OTGPHY clock	2025-05-28 10:04:40 +02:00
udc	drivers: usb: Enable USB and UDC OTGPHY clock	2025-05-28 10:04:40 +02:00
uhc	usb: host: rework usbh_xfer_alloc() parameters	2025-02-10 09:02:45 +01:00
uvb
CMakeLists.txt
Kconfig