zephyr/include/linker
Antony Pavlov 0369998e61 arch: add MIPS architecture support
MIPS (Microprocessor without Interlocked Pipelined Stages) is a
instruction set architecture (ISA) developed by MIPS Computer
Systems, now MIPS Technologies.

This commit provides MIPS architecture support to Zephyr. It is
compatible with the MIPS32 Release 1 specification.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00
..
app_smem_aligned.ld
app_smem_pinned_aligned.ld
app_smem_pinned_unaligned.ld
app_smem_pinned.ld
app_smem_unaligned.ld
app_smem.ld
common-noinit.ld
common-ram.ld ztest: Update ztest with more powerful testing APIs 2022-01-11 11:47:30 +01:00
common-rom.ld cmake: rework linker script generation and linker prebuilt stages 2021-11-16 10:41:59 +01:00
cplusplus-ram.ld
cplusplus-rom.ld
debug-sections.ld linker: add DWARF-5 debug sections 2021-11-15 14:52:25 -05:00
devicetree_regions.h linker: remove manual name specification 2021-12-09 16:23:03 +01:00
devicetree_reserved.h
intlist.ld
kobject-data.ld
kobject-priv-stacks.ld
kobject-rom.ld
kobject-text.ld
linker-defs.h arch: arm: core: aarch32: support for On-Chip Memory (OCM) areas in aarch32 2021-10-28 15:26:50 +02:00
linker-tool-gcc.h arch: add MIPS architecture support 2022-01-19 13:48:21 -05:00
linker-tool-mwdt.h
linker-tool.h
rel-sections.ld
section_tags.h arch: arm: core: aarch32: support for On-Chip Memory (OCM) areas in aarch32 2021-10-28 15:26:50 +02:00
sections.h arch: arm: core: aarch32: support for On-Chip Memory (OCM) areas in aarch32 2021-10-28 15:26:50 +02:00
thread-local-storage.ld