Eugeniy Paltsev 8165f3ad80 ARC: cleanup instruction cache initialization ... As of today during the Zephyr start we - invalidate I$ - disable I$ - enable I$ Given that we don't need to have I$ disabled during any initialization period and ARC processors have caches enabled after reset the I$ disabling/enabling is excessive, so we can drop it. By that we also aligh the I$ initialization on ARC with other projects like U-boot and Linux kernel. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>		2021-03-12 18:29:07 -05:00
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arc	ARC: cleanup instruction cache initialization	2021-03-12 18:29:07 -05:00
arm	aarch64: reset: initialize CNTFRQ_EL0 in the highest EL	2021-03-11 12:24:18 +01:00
common	gen_isr_tables: Added check of the IRQ num before accessing the vt	2021-01-24 10:12:54 -05:00
nios2	kernel: Cleanup logger setup in kernel files	2020-11-27 09:56:34 -05:00
posix	kernel: Add new k_thread_abort()/k_thread_join()	2021-02-24 16:39:15 -05:00
riscv	arch: riscv: add common stub reboot function	2021-03-04 11:09:51 -06:00
sparc	Revert "lib/os/heap: introduce option to force big heap mode"	2021-02-19 07:32:22 -05:00
x86	x86: remove CONFIG_CPU_MINUTEIA	2021-03-11 06:37:02 -05:00
xtensa	arch/xtensa: Remember to spill windows in arch_cohere_stacks()	2021-03-08 11:14:27 -05:00
CMakeLists.txt	cmake: fix include directories to work with out-of-tree arch	2020-08-05 08:06:07 -04:00
Kconfig	arch/xtensa: Inline atomics	2021-03-08 11:14:27 -05:00