zephyr/include/arch
Leandro Pereira 27ea2d8eb7 arch: xtensa: Convert Xtensa port to use gen_isr_table
The Xtensa port was the only one remaining to be converted to the new
way of connecting interrupts in Zephyr.  Some things are still
unconverted, mainly the exception table, and this will be performed
another time.

Of note: _irq_priority_set() isn't called on _ARCH_IRQ_CONNECT(), since
IRQs can't change priority on Xtensa: while the architecture has the
concept of interrupt priority levels, each line has a fixed level and
can't be changed.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-09 12:26:14 -07:00
..
arc linker: move all linker headers to include/linker 2017-06-18 09:24:04 -05:00
arm arm: mpu: Adjust to use opaque kernel data types 2017-08-09 13:36:09 -05:00
nios2 doc: spelling fixes in docs 2017-08-02 15:14:13 -04:00
riscv32 riscv32: pulpino: add some missing linker symbols 2017-07-18 14:22:26 -07:00
x86 x86: implement new linker variables 2017-08-03 11:46:26 -04:00
xtensa arch: xtensa: Convert Xtensa port to use gen_isr_table 2017-08-09 12:26:14 -07:00
cpu.h Xtensa port: Added support in arch/cpu.h for Xtensa cores. 2017-02-13 08:04:27 -08:00