f3c70b4ab8
Disable the pll2 when clearing the clock config prior to testing the clock_control driver for the stm32h7 Signed-off-by: Francois Ramu <francois.ramu@st.com> |
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|---|---|---|
| .. | ||
| adsp_clock | ||
| clock_control_api | ||
| fixed_clock | ||
| nrf_clock_calibration | ||
| nrf_lf_clock_start | ||
| nrf_onoff_and_bt | ||
| onoff | ||
| pwm_clock | ||
| stm32_clock_configuration | ||