zephyr/arch
Stephanos Ioannidis 2689590e67 arch: arm64: Disable ldp/stp Qn for consecutive 32-byte loads/stores
GCC may generate ldp/stp instructions with the Advanced SIMD Qn
registers for consecutive 32-byte loads and stores.

This commit disables this GCC behaviour because saving and restoring
the Advanced SIMD context is very expensive, and it is preferable to
keep it turned off by not emitting these instructions for better
context switching performance.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-23 12:10:25 +02:00
..
arc ARC: fx possible memory corruption with userspace 2022-09-21 18:46:06 +00:00
arm arch: arm: userspace: fix the incorrect ssf under bad syscall 2022-09-19 09:17:26 +02:00
arm64 arch: arm64: Disable ldp/stp Qn for consecutive 32-byte loads/stores 2022-09-23 12:10:25 +02:00
common cmake: Add support to add symbols to nocache section 2022-08-29 11:19:48 +02:00
mips include: types: remove ulong_t 2022-09-06 18:16:33 +02:00
nios2 arch: comply to coding guidelines MISRA C:2012 Rule 14.4 2022-07-20 09:28:38 -05:00
posix arch/posix: Fix main() renaming trickery 2022-09-15 16:23:11 +00:00
riscv riscv: smp: fix secondary cpus' initial stack 2022-09-21 09:01:58 +00:00
sparc SPARC: reduce z_thread_entry_wrapper 2022-08-03 12:05:49 +02:00
x86 x86: Kconfig: update dependency for X86_FP_USE_SOFT_FLOAT 2022-09-21 18:43:11 +00:00
xtensa xtensa: use lower-case hex in backtrace output 2022-09-09 14:09:33 -05:00
CMakeLists.txt
Kconfig arch/riscv: support CONFIG_CODE_DATA_RELOCATION 2022-08-24 10:08:06 +02:00