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zephyr/soc/xtensa
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Leandro Pereira 7cea94942c soc: esp32: Use the smaller interrupt handling routines 
Re-generate the ISR for ESP32, after modifying xtensa_intgen.py to
generate shorter code.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-10-22 13:38:29 -07:00
..
D_108mini linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
D_212GP linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
D_233L linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
esp32 soc: esp32: Use the smaller interrupt handling routines 2018-10-22 13:38:29 -07:00
hifi2_std linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
hifi3_bd5 linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
hifi3_bd5_call0 linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
hifi4_bd7 linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
hifi_mini linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
hifi_mini_4swIrq linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
intel_s1000 xtensa: intel_s1000: turn on XTENSA_ASM2 2018-10-19 17:52:45 -04:00
sample_controller linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
XRC_D2PM_5swIrq linker: warn about orphan sections 2018-10-19 16:11:34 -04:00
XRC_FUSION_AON_ALL_LM linker: warn about orphan sections 2018-10-19 16:11:34 -04:00