2552978df3
HSFLL120 is a clock used by fast peripherals, and it is controlled by the system controller. From an application perspective, it is a fixed clock. Note that it has multiple outputs (clk_main @ 320MHz, and clk_main2|4 which provide the main clock divided by 2 and 4, respectivelu). Only the main frequency is represented for now. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> |
||
|---|---|---|
| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||