Flavio Ceolin 49f0c74a9e arch: common: Fix 10.4 violations ... Both operands of an operator in which the usual arithmetic conversions are performed shall have the same essential type category. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>		2021-04-10 09:59:37 -04:00
..
CMakeLists.txt	arm/arm64: Make ARM64 a standalone architecture	2021-03-31 10:34:33 -05:00
gen_isr_tables.py	gen_isr_tables: Added check of the IRQ num before accessing the vt	2021-01-24 10:12:54 -05:00
isr_tables.c	isr_tables: adopt _irq_vector_table for using on 64bit architectures	2021-01-04 16:47:51 -08:00
nocache.ld	arch: common: nocache: fix linker section definition	2019-06-19 09:08:40 -07:00
ramfunc.ld
rom_start_offset.ld	config: Rename TEXT_SECTION_OFFSET to ROM_START_OFFSET	2020-07-09 14:02:38 -04:00
sw_isr_common.c	arch: common: Fix 10.4 violations	2021-04-10 09:59:37 -04:00
timing.c	arch: common: Fix 10.4 violations	2021-04-10 09:59:37 -04:00