Andrew Boie 6fd6b7e50a xtensa: remove legacy arch implementation ... We re-wrote the xtensa arch code, but never got around to purging the old implementation. Removed those boards which hadn't been moved to the new arch code. These were all xt-sim simulator targets and not real hardware. Fixes: #18138 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2019-09-12 01:26:34 -04:00
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arc	arc: rearrange for standard use of extern "C"	2019-08-20 00:49:15 +02:00
arm	linker: place debug header section for CC3235SF	2019-09-10 10:22:30 +03:00
common	arch/common: rearrange for standard use of extern "C"	2019-08-20 00:49:15 +02:00
nios2	arch/nios2: rearrange for standard use of extern "C"	2019-08-20 00:49:15 +02:00
posix	POSIX arch: Fixe issues related to extern "C"	2019-08-12 15:10:15 +02:00
riscv	interrupt: Convert RISC-V plic to use multi-level irq support	2019-09-10 07:34:57 -05:00
x86	arch/x86: linker.ld: do not pad _image_rom_end when XIP	2019-09-12 09:53:34 +08:00
x86_64	kernel: rename NANO_ESF	2019-07-25 15:06:58 -07:00
xtensa	xtensa: remove legacy arch implementation	2019-09-12 01:26:34 -04:00
cpu.h	riscv32: rename to riscv	2019-08-02 13:54:48 -07:00
syscall.h	arch/x86: move arch/x86/syscall.h to arch/x86/ia32/syscall.h	2019-07-02 19:30:00 -04:00