Laurentiu Mihalcea 2f40474c14 nxp: imx8ulp: correct value of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC ... The core clock of 8ULP's HIFI4 DSP runs at 475.2MHz. As such, correct the value of `CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC` to reflect this. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>		2024-03-15 06:27:13 -04:00
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imx	nxp: imx8ulp: correct value of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC	2024-03-15 06:27:13 -04:00
imxrt	soc: nxp: imxrt: fix dependencies of NXP_IMXRT_BOOT_HEADER for RT11xx	2024-03-15 08:51:24 +01:00
kinetis
layerscape
lpc
mcx	soc: mcxn947: Add support for NXP MCXN947	2024-03-13 22:38:46 +00:00
rw	soc: nxp: Add RW SOC Family	2024-03-13 16:45:13 +00:00
s32