zephyr/soc/intel
Luca Burelli e35126f83a soc: intel_socfpga_std/cyclonev: enforce ARM_AARCH32_MMU
Currently the code in soc.c depends on the MMU of the CPU being enabled,
but this is not enforced. It is thus possible to cause a build error by
manually disabling it (as is required for some LLEXT tests, see #75289).

Make sure this is averted by explicitly selecting ARM_AARCH32_MMU in the
SoC Kconfig.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2024-07-05 18:39:53 +02:00
..
alder_lake soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00
apollo_lake drivers/timer/apic_tsc: use ICR as a fallback timeout event source 2024-05-29 08:40:43 +02:00
atom
common soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00
elkhart_lake
intel_adsp ace: power: replace pseudo-assembly movi 2024-07-04 18:01:02 -04:00
intel_ish soc: intel_ish: Make ISH support APIC timer with TSC time source. 2024-06-12 17:10:25 -05:00
intel_niosv
intel_socfpga
intel_socfpga_std soc: intel_socfpga_std/cyclonev: enforce ARM_AARCH32_MMU 2024-07-05 18:39:53 +02:00
lakemont
raptor_lake soc: x86: add gpio acpi resource enumeration 2024-04-22 06:50:38 -07:00