zephyr/arch/xtensa/core
Daniel Leung 8c10964435 xtensa: mmu: clear ZSR_DEPC_SAVE at boot
ZSR_DEPC_SAVE is being used to determine whether we are faulting
inside double exception if this is not zero. It is possible that
the boot ROM or custom startup code leaves this non-zero, which
would result in a fake triple fault. So clear it at boot. Note
that the zeroing is done in MMU init code as these triple
faults are not actual hardware ones but only semantics, and will
occur once MMU is enabled.

Fixes #75194

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-06-28 20:53:37 -04:00
..
offsets xtensa: mpu: enable userspace support 2024-03-19 22:17:34 -04:00
startup xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
CMakeLists.txt build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
coredump.c arch: define struct arch_esf and deprecate z_arch_esf_t 2024-06-04 14:02:51 -05:00
cpu_idle.c arch/xtensa: clean up arch_cpu_idle function 2023-11-20 11:14:41 +01:00
crt1.S xtensa: mmu: Simplify initialization 2023-11-21 15:49:48 +01:00
debug_helpers_asm.S build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
elf.c llext: xtensa: add support for in-place relocatable extensions 2024-04-11 11:35:24 -05:00
fatal.c arch: xtensa: fatal: Comply with MISRA Rule 14.4 2024-06-17 17:46:16 -04:00
gdbstub.c arch: define struct arch_esf and deprecate z_arch_esf_t 2024-06-04 14:02:51 -05:00
gen_vectors.py arch/xtensa: Add automatic vector linkage generation 2024-05-22 13:39:47 -05:00
gen_zsr.py xtensa: make it work with TLB misses during interrupt handling 2024-06-15 04:44:48 -04:00
irq_manage.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
irq_offload.c build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
mem_manage.c xtensa: move to use system cache API support for coherency 2024-02-03 13:42:33 -05:00
mmu.c xtensa: mmu: Fix rasid initial value 2024-03-14 13:24:41 -05:00
mpu.c xtensa: mmu: mpu: add xtensa_mem_kernel_has_access() 2024-06-15 04:44:48 -04:00
ptables.c xtensa: mmu: clear ZSR_DEPC_SAVE at boot 2024-06-28 20:53:37 -04:00
README_MMU.txt everywhere: replace double words 2024-06-25 06:05:35 -04:00
README_WINDOWS.rst xtensa: rename files with hyphens to underscores 2023-12-13 09:41:24 +01:00
smp.c arch: call arch_smp_init() directly, do not use SYS_INIT 2024-06-12 18:23:54 -04:00
syscall_helper.c xtensa: make arch_user_string_nlen actually work 2024-06-15 04:44:48 -04:00
thread.c xtensa: rename z_xtensa to simply xtensa 2023-12-13 09:41:24 +01:00
timing.c
tls.c
userspace.S xtensa: make arch_user_string_nlen actually work 2024-06-15 04:44:48 -04:00
vector_handlers.c xtensa: check stack frame pointer before dumping registers 2024-06-21 09:59:36 +02:00
window_vectors.S build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
xcc_stubs.c
xtensa_asm2_util.S xtensa: mmu: bail on semantic triple faults 2024-06-15 04:44:48 -04:00
xtensa_backtrace.c soc: xtensa/dc233c: remove xtensa_dc233c_stack_ptr_is_sane 2024-06-21 09:59:36 +02:00
xtensa_hifi.S build: namespace the generated headers with zephyr/ 2024-05-28 22:03:55 +02:00
xtensa_intgen.py arch/xtensa: xtensa_intgen.py: Emit handlers for all levels 2024-05-20 20:50:55 -04:00
xtensa_intgen.tmpl