Andy Ross c6d077e1bc soc: intel_adsp/cavs_v25: Add CPU halt and relaunch APIs ... Add a SOC API to allow for application control over deep idle power states. Note that the hardware idle entry happens out of the WAITI instruction, so the application has to be responsibile for ensuring the CPU to be halted actually reaches idle deterministically. Lots of warnings in the docs to this effect. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2021-09-03 07:19:34 -04:00
..
gen_offset.h	aarch64: Use absolute symbols for the callee saved registers	2020-11-17 18:59:23 -05:00
kernel_arch_interface.h	kernel: mmu: introduce arch_page_phys_get()	2021-05-07 13:36:22 -04:00
kernel_internal.h	soc: intel_adsp/cavs_v25: Add CPU halt and relaunch APIs	2021-09-03 07:19:34 -04:00
kernel_offsets.h	kernel: add an architecture specific structs header	2021-04-21 09:03:47 -04:00
kernel_tls.h	kernel: tls: align tdata/tbss sections in stack	2021-02-07 23:28:43 -05:00
ksched.h	kernel/sched: Remove "cooperative scheduling only" special cases	2021-05-24 23:38:16 -04:00
kswap.h	kernel/swap: Add assertion to catch lock-breaking context switches	2021-05-17 15:27:37 -04:00
mmu.h	kernel: mmu: z_backing_store* to k_mem_paging_backing_store*	2021-05-28 11:33:22 -04:00
offsets_short.h	kernel: add common bits to support TLS	2020-10-24 10:52:00 -07:00