e33ae1d613
We should be adding a compiler barrier for IP register when we are doing syscall generation on Cortex-M architecture. The syscall generation itself only does an SVC trigger; the execution returns to thread mode and ARM does not guarantee that IP register is preserved, when we finally get back to the point where the syscall was invoked. This may be a problem, when the compiler inlines the arch_syscall_invoke function, so the IP register may be in use. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no> |
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| .. | ||
| arc | ||
| arm | ||
| common | ||
| nios2 | ||
| posix | ||
| riscv | ||
| x86 | ||
| xtensa | ||
| arch_inlines.h | ||
| cpu.h | ||
| syscall.h | ||