zephyr/include/arch
Mark Holden 7803a4e590 arch: riscv: ARCH_EXCEPT macro
Enable ARCH_EXCEPT macro for non-usermode scenario for RISC-V
Macro will now raise an illegal instruction exception so that mepc will
hold expected value in exception handler, and generated coredump can
reconstruct the failing stack

Coredump tests running on renode (for RISC-V) can now utilize fatal error
path through k_panic

Signed-off-by: Mark Holden <mholden@fb.com>
2022-01-01 07:38:20 -05:00
..
arc clock: add k_cycle_get_64 2021-11-08 13:41:53 -05:00
arm/aarch32 linker: remove manual name specification 2021-12-09 16:23:03 +01:00
arm64 clock: add k_cycle_get_64 2021-11-08 13:41:53 -05:00
common include: common: Add sys_set_bits and set_clear_bits inline functions 2021-10-12 08:37:03 -04:00
nios2 clock: add k_cycle_get_64 2021-11-08 13:41:53 -05:00
posix clock: add k_cycle_get_64 2021-11-08 13:41:53 -05:00
riscv arch: riscv: ARCH_EXCEPT macro 2022-01-01 07:38:20 -05:00
sparc clock: add k_cycle_get_64 2021-11-08 13:41:53 -05:00
x86 x86: gdbstub: remove ARCH_GDB_NUM_REGISTERS 2021-11-30 15:24:00 -05:00
xtensa arch/xtensa: Fix cache.h include dependency 2021-12-15 16:50:11 -05:00
arch_inlines.h arm/arm64: Make ARM64 a standalone architecture 2021-03-31 10:34:33 -05:00
cpu.h arm/arm64: Make ARM64 a standalone architecture 2021-03-31 10:34:33 -05:00
structs.h kernel: add an architecture specific structs header 2021-04-21 09:03:47 -04:00
syscall.h arm/arm64: Make ARM64 a standalone architecture 2021-03-31 10:34:33 -05:00