Laurentiu Mihalcea 3651725316 dts: xtensa: nxp_imx8: add edma power domains ... Add power domains for EDMA0's channels 6, 7, 14, and 15. For QM these are identified as IMX_SC_R_DMA_2_*, while for QXP thy are identified as IMX_SC_R_DMA_0_*. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>		2024-12-13 20:05:00 +01:00
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amd	soc: amd: acp_6_0: add support for AMD ACP_6_0 soc.	2024-11-19 17:53:11 -05:00
espressif	dts: espressif: Update AMP sram nodes for ESP32 and ESP32-S3	2024-12-12 11:38:22 +01:00
intel	dai: intel: ssp: Refactor power management initialization	2024-12-11 21:34:57 +01:00
nxp	dts: xtensa: nxp_imx8: add edma power domains	2024-12-13 20:05:00 +01:00
dc233c.dtsi	xtensa: dc233c: Fix build warning in DTS on leading zeros	2024-04-03 20:41:45 -04:00
sample_controller32.dtsi	soc: xtensa: add sample_controller32	2024-10-02 09:58:36 +02:00
sample_controller.dtsi
xtensa.dtsi