zephyr/arch/arm/core
Stephanos Ioannidis 734fa185c8 arch: arm: cortex_m: Use Thumb-1 compatible 'mov reg, imm' mnemonic
The ARM Thumb-1 instruction set, used by ARMv6-M and ARMv8-M Baseline
cores, does not have a valid encoding for "immediate-to-register move
without affecting flags" instruction (i.e. `mov reg, imm`), and the only
valid variant of immediate-to-register move instruction for it is `movs`,
which affects the flags.

Since none of the register initialisation instructions used here are
flag-sensitive in their context, this commit changes `mov` to `movs`.

This fixes the compilation errors with Clang/LLVM, which is more picky
about the `mov` mnemonic usage and prints out an "invalid instruction"
error when `mov reg, imm` is specified in Thumb-1 mode.

Note that GNU assembler implicitly converts `mov reg, imm` to `movs reg,
imm` when assembling in Thumb-1 mode.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2024-12-13 11:35:06 +01:00
..
cortex_a_r kernel: arch: move arch_swap() declaration 2024-12-11 21:33:49 +01:00
cortex_m arch: arm: cortex_m: Use Thumb-1 compatible 'mov reg, imm' mnemonic 2024-12-13 11:35:06 +01:00
mmu
mpu arch: arm: rename CPU_HAS_NXP_MPU to align with binding 2024-12-06 22:23:06 +01:00
offsets arch: arm: cortex_m: pm_s2ram: add support for all architectures 2024-11-16 14:00:44 -05:00
__aeabi_atexit.c
CMakeLists.txt
elf.c llext: Move arm-specific relocation names from generic LLEXT file 2024-09-12 14:48:55 +02:00
fatal.c coredump: ARM: Ensure sp in dump is set as gdb expects 2024-11-06 10:17:59 -08:00
gdbstub.c arch: define struct arch_esf and deprecate z_arch_esf_t 2024-06-04 14:02:51 -05:00
header.S
irq_offload.c arch: initialize irq_offload during boot, do not use SYS_INIT 2024-09-17 20:05:22 -04:00
Kconfig arch: arm: do not enable PLATFORM_SPECIFIC_INIT if SOC_RESET_HOOK=y 2024-09-16 15:12:18 -04:00
Kconfig.vfp
nmi_on_reset.S
nmi.c
swi_tables.ld
tls.c
userspace.S
vector_table.ld
zimage_header.ld