Carlo Caione 99a8155914 arm: AArch64: Add support for nested exception handlers ... In the current implementation both SPSR and ELR registers are saved with the callee-saved registers and restored by the context-switch routine. To support nested IRQs we have to save those on the stack when entering and exiting from an ISR. Since the values are now carried on the stack we can now add those to the ESF and the initial stack and take care to restore them for new threads using the new thread wrapper routine. Signed-off-by: Carlo Caione <ccaione@baylibre.com>		2020-03-31 19:24:48 +02:00
..
arc	global: Replace BUILD_ASSERT_MSG() with BUILD_ASSERT()	2020-03-31 07:18:06 +02:00
arm	arm: AArch64: Add support for nested exception handlers	2020-03-31 19:24:48 +02:00
common	sys_io: pull in toolchain.h	2019-10-09 09:14:18 -04:00
nios2	extensions.cmake: Replace TEXT_START with ROM_START	2020-01-23 03:22:59 -08:00
posix	posix: add zephyr_linker_sources() support	2020-03-13 19:24:21 +01:00
riscv	extensions.cmake: Replace TEXT_START with ROM_START	2020-01-23 03:22:59 -08:00
x86	kernel: rename _k_thread_stack_element	2020-03-17 20:11:27 +02:00
xtensa	arch: xtensa: Add support for Intel Apollolake	2020-02-05 10:43:25 -05:00
arch_inlines.h	headers: Refactor kernel and arch headers.	2019-11-06 16:07:32 -08:00
cpu.h	arch: arm64: Introduce ARM64 (AArch64) architecture	2020-02-01 08:08:43 -05:00
syscall.h	x86: add system call functions for 64-bit	2020-01-13 16:35:10 -05:00