e62e54bdcd
Keeping IRQ0 priority as 1 and IRQ1 priority as 0 so that system timer which of priority 0 in ARC will be interrupted by IRQ1 of same priority. In ARM, system timer is of priority 1, hence making ISR0 priority as 2 and ISR1 priority as 1. Thus system timer will always be interrupted by ISR1 in both the architectures. Fixes: #12147 Signed-off-by: Spoorthi K <spoorthi.k@intel.com> |
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| .. | ||
| application_development | ||
| benchmarks | ||
| bluetooth | ||
| boards | ||
| booting/stub | ||
| cmsis_rtos_v1 | ||
| cmsis_rtos_v2 | ||
| compliance | ||
| crypto | ||
| drivers | ||
| include | ||
| kernel | ||
| lib | ||
| misc/test_build | ||
| net | ||
| posix | ||
| power | ||
| shell | ||
| subsys | ||
| unit | ||
| ztest | ||
| CMakeLists.txt | ||
| Kconfig | ||