3e82647ba6
The actual clock speed of the bus is partially determined by the rising/falling edges of the SCL. These settings allow applications to tune the clock based on board characteristics. Signed-off-by: Corey Wharton <xodus7@cwharton.com> |
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| .. | ||
| arc/synopsys | ||
| arm | ||
| arm64 | ||
| bindings | ||
| common | ||
| nios2/intel | ||
| posix | ||
| riscv | ||
| sparc/gaisler | ||
| x86/intel | ||
| xtensa | ||
| binding-template.yaml | ||
| Kconfig | ||