zephyr/doc/kernel
Nicolas Pitre ff07da6ff1 riscv: integrate the new FPU context switching support
FPU context switching is always performed on demand through the FPU
access exception handler. Actual task switching only grants or denies
FPU access depending on the current FPU owner.

Because RISC-V doesn't have a dedicated FPU access exception, we must
catch the Illegal Instruction exception and look for actual FP opcodes.

There is no longer a need to allocate FPU storage on the stack for every
exception making esf smaller and stack overflows less likely.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-01-24 15:26:18 +01:00
..
data_structures doc: Fix kernel data structures typos 2022-10-10 21:01:51 -04:00
drivers drivers: pcie: reintroduce support for I/O BARs 2022-11-01 15:22:31 -04:00
iterable_sections
memory_management doc: kernel: Re-organise memory management API pages 2022-06-01 15:26:48 +02:00
services riscv: integrate the new FPU context switching support 2023-01-24 15:26:18 +01:00
timing_functions
usermode doc: update stale references to boilerplate.cmake 2023-01-11 09:40:14 +01:00
util
code-relocation.rst doc: code-relocation: Update usage of zephyr_code_relocate 2023-01-17 18:08:37 +01:00
index.rst doc: develop: Add 'Language Support' sub-category 2022-06-01 15:26:48 +02:00
timeutil.rst