zephyr/subsys/testsuite/include
Krzysztof Chruscinski ffc4a6c928 testsuite: Add busy simulator module
Busy simulator is using counter device and entropy device to
generate random cpu load. Counter device cofiguration can be
used to set cpu load interrupt priority and optional pin that
can be set during the load.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-07-29 10:59:00 -04:00
..
busy_sim.h testsuite: Add busy simulator module 2021-07-29 10:59:00 -04:00
interrupt_util.h testsuite: utils: move the interrupt_util.h into testsuite 2021-03-30 08:18:23 -04:00
tc_util.h testsuite: Factor out suite header/footer to tc_util.h 2021-04-28 12:54:13 -04:00
test_asm_inline_gcc.h tests: Add missing timestamp_serialize() for Armv8-R aarch64 2021-04-13 07:47:44 -04:00
test_utils.h
timestamp.h