9c961571a2
The CMSIS module glue code was part of arch/ directory. Move it to modules/cmsis, and provide a single entry point for it: cmsis_core.h. This entry header will include the right CMSIS header (M or A/R). To make this change possible, CMSIS module Kconfig/CMake are declared as external, allowing us to add a new Zephyr include directory. All files including CMSIS have been updated. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
59 lines
1.4 KiB
C
59 lines
1.4 KiB
C
/*
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* Copyright (c) 2018 Intel Corporation.
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* Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/sys/printk.h>
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/*
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* This function will allow execute from sram region. This is needed only for
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* this sample because by default all soc will disable the execute from SRAM.
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* An application that requires that the code be executed from SRAM will have
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* to configure the region appropriately in arm_mpu_regions.c.
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*/
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#ifdef CONFIG_ARM_MPU
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#include <cmsis_core.h>
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void disable_mpu_rasr_xn(void)
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{
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uint32_t index;
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/*
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* Kept the max index as 8(irrespective of soc) because the sram would
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* most likely be set at index 2.
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*/
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for (index = 0U; index < 8; index++) {
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MPU->RNR = index;
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#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
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if (MPU->RBAR & MPU_RBAR_XN_Msk) {
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MPU->RBAR ^= MPU_RBAR_XN_Msk;
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}
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#else
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if (MPU->RASR & MPU_RASR_XN_Msk) {
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MPU->RASR ^= MPU_RASR_XN_Msk;
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}
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#endif /* CONFIG_ARMV8_M_BASELINE || CONFIG_ARMV8_M_MAINLINE */
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}
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}
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#endif /* CONFIG_ARM_MPU */
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extern void function_in_ext_flash(void);
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extern void function_in_sram(void);
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int main(void)
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{
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#ifdef CONFIG_ARM_MPU
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disable_mpu_rasr_xn();
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#endif /* CONFIG_ARM_MPU */
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printk("Address of %s function %p\n", __func__, &main);
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function_in_ext_flash();
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function_in_sram();
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printk("Hello World! %s\n", CONFIG_BOARD);
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return 0;
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}
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