c174ade4a1
The Xtensa implementation of arch_irq_offload() required that the user select the correct interrupt manually, and would race with itself if invoked from separate CPUs (it was saved here by the main irq_offload() function which has a semaphore to serialize access). Use the new gen_zsr.py script to automatically detect the highest available software interrupt, and keep a per-CPU set of callback/parameter pointers. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
20 lines
348 B
Plaintext
20 lines
348 B
Plaintext
# XTENSA board configuration
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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# Copyright (c) 2016 Cadence Design Systems, Inc.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_XTENSA_SAMPLE_CONTROLLER
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config SOC
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default "sample_controller"
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config SOC_TOOLCHAIN_NAME
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string
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default "sample_controller"
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config LOG_BACKEND_XTENSA_SIM
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default LOG
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endif
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