88477906f0
Let's fully exploit tpidrro_el0 by storing in it the current CPU's struct _cpu instance alongside the userspace mode flag bit. This greatly simplifies the code needed to get at the cpu structure, and this paves the way to much simpler multi cluster support, as there is no longer the need to decode MPIDR all the time. The same code is used in the !SMP case as there are benefits there too such as avoiding the literal pool, and it looks cleaner. The tpidrro_el0 value is no longer stored in the exception stack frame. Instead, we simply restore the user mode flag based on the SPSR value. This way, more flag bits could be used independently in the future. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
180 lines
4.5 KiB
C
180 lines
4.5 KiB
C
/*
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* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ARM64 specific syscall header
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*
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* This header contains the ARM64 specific syscall interface. It is
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* included by the syscall interface architecture-abstraction header
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* (include/arch64/syscall.h)
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM64_SYSCALL_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM64_SYSCALL_H_
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#define _SVC_CALL_CONTEXT_SWITCH 0
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#define _SVC_CALL_IRQ_OFFLOAD 1
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#define _SVC_CALL_RUNTIME_EXCEPT 2
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#define _SVC_CALL_SYSTEM_CALL 3
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#ifdef CONFIG_USERSPACE
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#ifndef _ASMLANGUAGE
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#include <zephyr/types.h>
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#include <stdbool.h>
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#include <arch/arm64/lib_helpers.h>
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#include <arch/arm64/tpidrro_el0.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Syscall invocation macros. arm-specific machine constraints used to ensure
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* args land in the proper registers.
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*/
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static inline uintptr_t arch_syscall_invoke6(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3, uintptr_t arg4,
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uintptr_t arg5, uintptr_t arg6,
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uintptr_t call_id)
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{
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register uint64_t ret __asm__("x0") = arg1;
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register uint64_t r1 __asm__("x1") = arg2;
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register uint64_t r2 __asm__("x2") = arg3;
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register uint64_t r3 __asm__("x3") = arg4;
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register uint64_t r4 __asm__("x4") = arg5;
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register uint64_t r5 __asm__("x5") = arg6;
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register uint64_t r8 __asm__("x8") = call_id;
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__asm__ volatile("svc %[svid]\n"
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: "=r"(ret)
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: [svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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"r" (r4), "r" (r5), "r" (r8)
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: "memory");
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return ret;
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}
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static inline uintptr_t arch_syscall_invoke5(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3, uintptr_t arg4,
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uintptr_t arg5,
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uintptr_t call_id)
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{
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register uint64_t ret __asm__("x0") = arg1;
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register uint64_t r1 __asm__("x1") = arg2;
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register uint64_t r2 __asm__("x2") = arg3;
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register uint64_t r3 __asm__("x3") = arg4;
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register uint64_t r4 __asm__("x4") = arg5;
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register uint64_t r8 __asm__("x8") = call_id;
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__asm__ volatile("svc %[svid]\n"
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: "=r"(ret)
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: [svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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"r" (r4), "r" (r8)
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: "memory");
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return ret;
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}
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static inline uintptr_t arch_syscall_invoke4(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3, uintptr_t arg4,
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uintptr_t call_id)
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{
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register uint64_t ret __asm__("x0") = arg1;
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register uint64_t r1 __asm__("x1") = arg2;
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register uint64_t r2 __asm__("x2") = arg3;
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register uint64_t r3 __asm__("x3") = arg4;
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register uint64_t r8 __asm__("x8") = call_id;
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__asm__ volatile("svc %[svid]\n"
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: "=r"(ret)
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: [svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r3),
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"r" (r8)
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: "memory");
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return ret;
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}
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static inline uintptr_t arch_syscall_invoke3(uintptr_t arg1, uintptr_t arg2,
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uintptr_t arg3,
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uintptr_t call_id)
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{
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register uint64_t ret __asm__("x0") = arg1;
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register uint64_t r1 __asm__("x1") = arg2;
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register uint64_t r2 __asm__("x2") = arg3;
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register uint64_t r8 __asm__("x8") = call_id;
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__asm__ volatile("svc %[svid]\n"
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: "=r"(ret)
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: [svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r2), "r" (r8)
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: "memory");
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return ret;
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}
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static inline uintptr_t arch_syscall_invoke2(uintptr_t arg1, uintptr_t arg2,
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uintptr_t call_id)
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{
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register uint64_t ret __asm__("x0") = arg1;
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register uint64_t r1 __asm__("x1") = arg2;
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register uint64_t r8 __asm__("x8") = call_id;
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__asm__ volatile("svc %[svid]\n"
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: "=r"(ret)
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: [svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r1), "r" (r8)
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: "memory");
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return ret;
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}
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static inline uintptr_t arch_syscall_invoke1(uintptr_t arg1,
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uintptr_t call_id)
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{
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register uint64_t ret __asm__("x0") = arg1;
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register uint64_t r8 __asm__("x8") = call_id;
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__asm__ volatile("svc %[svid]\n"
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: "=r"(ret)
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: [svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r8)
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: "memory");
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return ret;
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}
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static inline uintptr_t arch_syscall_invoke0(uintptr_t call_id)
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{
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register uint64_t ret __asm__("x0");
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register uint64_t r8 __asm__("x8") = call_id;
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__asm__ volatile("svc %[svid]\n"
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: "=r"(ret)
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: [svid] "i" (_SVC_CALL_SYSTEM_CALL),
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"r" (ret), "r" (r8)
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: "memory");
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return ret;
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}
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static inline bool arch_is_user_context(void)
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{
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return (read_tpidrro_el0() & TPIDRROEL0_IN_EL0) != 0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* CONFIG_USERSPACE */
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM64_SYSCALL_H_ */
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