Andy Ross 642fc7ad54 arch/xtensa: Use ZSR assignments for stack flush markers ... The kernel coherence cache flush code was using a scratch register to mark the top of the stack. Likewise a good candidate for ZSR use. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2022-01-20 12:58:00 -05:00
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kernel_arch_func.h	arch/xtensa: Use ZSR assignments for stack flush markers	2022-01-20 12:58:00 -05:00
offsets_short_arch.h	arch/xtensa: General cleanup, remove dead code	2021-03-08 11:14:27 -05:00
xtensa-asm2-context.h	arch: xtensa: Print backtrace from panic handler	2021-01-23 08:43:10 -05:00
xtensa-asm2-s.h	arch: xtensa: add workaround for small vector table entries	2021-09-10 10:59:44 -04:00
xtensa-asm2.h