Andy Ross c174ade4a1 arch/xtensa: Rework irq_offload: automatic config, SMP-safe ... The Xtensa implementation of arch_irq_offload() required that the user select the correct interrupt manually, and would race with itself if invoked from separate CPUs (it was saved here by the main irq_offload() function which has a semaphore to serialize access). Use the new gen_zsr.py script to automatically detect the highest available software interrupt, and keep a per-CPU set of callback/parameter pointers. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>		2022-02-21 22:10:03 -05:00
..
include
offsets
startup	soc/intel_adsp: Unify Xtensa CPU reset between cores	2021-12-14 18:43:05 -06:00
CMakeLists.txt	xtensa: xcc: add a dummy atexit()	2022-01-25 21:16:32 -05:00
coredump.c	debug: coredump: add xtensa coredump	2021-12-14 07:40:55 -05:00
cpu_idle.c
crt1.S
debug_helpers_asm.S
fatal.c
gdbstub.c	xtensa: introduce support for GDB stub	2021-11-30 15:24:00 -05:00
gen_zsr.py	arch/xtensa: Rework irq_offload: automatic config, SMP-safe	2022-02-21 22:10:03 -05:00
irq_manage.c	xtensa: remove @return doc for void functions	2022-01-12 16:02:16 -05:00
irq_offload.c	arch/xtensa: Rework irq_offload: automatic config, SMP-safe	2022-02-21 22:10:03 -05:00
README-WINDOWS.rst
tls.c
window_vectors.S	arch/xtensa: Use ZSR assignments for the alloca exception	2022-01-20 12:58:00 -05:00
xcc_stubs.c	xtensa: xcc: add a dummy atexit()	2022-01-25 21:16:32 -05:00
xtensa_backtrace.c
xtensa_intgen.py	Revert "xtensa: remove unused script"	2021-10-07 16:04:11 -04:00
xtensa_intgen.tmpl
xtensa-asm2-util.S	arch/xtensa: Use ZSR assignments for interrupt return	2022-01-20 12:58:00 -05:00
xtensa-asm2.c	xtensa: introduce support for GDB stub	2021-11-30 15:24:00 -05:00