0369998e61
MIPS (Microprocessor without Interlocked Pipelined Stages) is a instruction set architecture (ISA) developed by MIPS Computer Systems, now MIPS Technologies. This commit provides MIPS architecture support to Zephyr. It is compatible with the MIPS32 Release 1 specification. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
40 lines
773 B
C
40 lines
773 B
C
/*
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* Copyright (c) 2020 Antony Pavlov <antonynpavlov@gmail.com>
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*
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* based on arch/riscv/include/kernel_arch_data.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Private kernel definitions
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*
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* This file contains private kernel structures definitions and various
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* other definitions for the MIPS processor architecture.
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*/
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#ifndef ZEPHYR_ARCH_MIPS_INCLUDE_KERNEL_ARCH_DATA_H_
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#define ZEPHYR_ARCH_MIPS_INCLUDE_KERNEL_ARCH_DATA_H_
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#include <toolchain.h>
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#include <arch/cpu.h>
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#ifndef _ASMLANGUAGE
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#include <kernel.h>
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#include <zephyr/types.h>
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#include <sys/util.h>
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#include <sys/dlist.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_ARCH_MIPS_INCLUDE_KERNEL_ARCH_DATA_H_ */
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