zephyr/include/arch
Nicolas Pitre f9461d1ac4 mmu: fix ARM64 compilation by removing z_mapped_size usage
The linker script defines `z_mapped_size` as follows:

```
	z_mapped_size = z_mapped_end - z_mapped_start;
```

This is done with the belief that precomputed values at link time will
make the code smaller and faster.

On Aarch64, symbol values are relocated and loaded relative to the PC
as those are normally meant to be memory addresses.

Now if you have e.g. `CONFIG_SRAM_BASE_ADDRESS=0x2000000000` then
`z_mapped_size` might still have a reasonable value, say 0x59334.
But, when interpreted as an address, that's very very far from the PC
whose value is in the neighborhood of 0x2000000000. That overflows the
4GB relocation range:

```
kernel/libkernel.a(mmu.c.obj): in function `z_mem_manage_init':
kernel/mmu.c:527:(.text.z_mem_manage_init+0x1c):
relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21
```

The solution is to define `Z_KERNEL_VIRT_SIZE` in terms of
`z_mapped_end - z_mapped_start` at the source code level. Given this
is used within loops that already start with `z_mapped_start` anyway,
the compiler is smart enough to combine the two occurrences and
dispense with a size counter, making the code effectively
slightly better for all while avoiding the Aarch64 relocation
overflow:

```
   text    data     bss     dec     hex filename
   1216       8  294936  296160   484e0 mmu.c.obj.arm64.before
   1212       8  294936  296156   484dc mmu.c.obj.arm64.after
   1110       8    9244   10362    287a mmu.c.obj.x86-64.before
   1106       8    9244   10358    2876 mmu.c.obj.x86-64.after
```

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-02-05 17:19:56 -05:00
..
arc arc: sys_io: fix sys_read32 return value from uint16_t to uint32_t 2021-01-22 09:32:09 -05:00
arm mmu: fix ARM64 compilation by removing z_mapped_size usage 2021-02-05 17:19:56 -05:00
common ARCH: COMMON: split sys_io.h for MMIO & memory bits functions 2020-09-01 13:36:48 +02:00
nios2 arch: Apply dynamic IRQ API change 2020-09-02 13:48:13 +02:00
posix Revert "posix: linker: Wrap rodata and rwdata in sections." 2020-09-02 14:46:01 -04:00
riscv tests: coverage: exclude the CODE UNREACHABLE of code coverage 2021-01-15 12:42:00 -05:00
sparc arch: sparc: fix memory barrier behavior of arch_irq_*lock 2021-01-26 13:42:17 -05:00
x86 x86: implement demand paging APIs 2021-01-23 19:47:23 -05:00
xtensa xtensa: remove core-macros.h from xtensa HAL 2021-01-14 09:40:08 -05:00
arch_inlines.h headers: Refactor kernel and arch headers. 2019-11-06 16:07:32 -08:00
cpu.h arch: Add SPARC processor architecture 2020-11-13 14:53:55 -08:00
syscall.h arch: riscv: add memory protection support 2020-11-09 15:37:11 -05:00