zephyr/soc
Alexandre Bourdiol e3e2eb0fbe soc: arm: stm32l0: enable clock before accessing DBGMCU registers
Some STM32 series (l0, g0, f0) needs to enable clock of
DBGMCU peripheral, before accessing registers

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-07-30 07:06:03 -04:00
..
arc arc: hsdk: add compiler options without check 2021-05-25 07:04:32 -05:00
arm soc: arm: stm32l0: enable clock before accessing DBGMCU registers 2021-07-30 07:06:03 -04:00
arm64 soc: arm64: arm: fvp_base_r: define a strong pm_cpu_on() function 2021-07-13 09:30:29 -04:00
nios2
posix posix: Add missing include 2021-04-27 13:17:36 -04:00
riscv ITE: soc/riscv riscv-ite: create a shared macro to access the pinctrl_0 2021-07-29 11:48:13 -04:00
sparc boards: set CPU_HAS_FPU on LEON3 soc and boards 2020-12-04 14:33:43 +02:00
x86 soc/x86: Clean up EHL kconfigs 2021-05-07 16:48:58 -04:00
xtensa soc: esp32s2: add initial soc support files for esp32s2 2021-07-28 21:09:27 -04:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00