75f77db432
There are issues using lowercase min and max macros when compiling a C++ application with a third-party toolchain such as GNU ARM Embedded when using some STL headers i.e. <chrono>. This is because there are actual C++ functions called min and max defined in some of the STL headers and these macros interfere with them. By changing the macros to UPPERCASE, which is consistent with almost all other pre-processor macros this naming conflict is avoided. All files that use these macros have been updated. Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
129 lines
2.7 KiB
C
129 lines
2.7 KiB
C
/*
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <drivers/system_timer.h>
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#include <sys_clock.h>
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#include <spinlock.h>
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#include <xtensa_rtos.h>
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#define TIMER_IRQ UTIL_CAT(XCHAL_TIMER, \
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UTIL_CAT(CONFIG_XTENSA_TIMER_ID, _INTERRUPT))
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#define CYC_PER_TICK (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \
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/ CONFIG_SYS_CLOCK_TICKS_PER_SEC)
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#define MAX_TICKS ((0xffffffffu - CYC_PER_TICK) / CYC_PER_TICK)
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#define MIN_DELAY 1000
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static struct k_spinlock lock;
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static unsigned int last_count;
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static void set_ccompare(u32_t val)
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{
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__asm__ volatile ("wsr.CCOMPARE" STRINGIFY(CONFIG_XTENSA_TIMER_ID) " %0"
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:: "r"(val));
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}
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static u32_t ccount(void)
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{
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u32_t val;
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__asm__ volatile ("rsr.CCOUNT %0" : "=r"(val));
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return val;
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}
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static void ccompare_isr(void *arg)
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{
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ARG_UNUSED(arg);
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k_spinlock_key_t key = k_spin_lock(&lock);
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u32_t curr = ccount();
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u32_t dticks = (curr - last_count) / CYC_PER_TICK;
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last_count += dticks * CYC_PER_TICK;
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL) ||
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IS_ENABLED(CONFIG_QEMU_TICKLESS_WORKAROUND)) {
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u32_t next = last_count + CYC_PER_TICK;
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if ((s32_t)(next - curr) < MIN_DELAY) {
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next += CYC_PER_TICK;
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}
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set_ccompare(next);
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}
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k_spin_unlock(&lock, key);
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z_clock_announce(dticks);
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}
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/* The legacy Xtensa platform code handles the timer interrupt via a
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* special path and must find it via this name. Remove once ASM2 is
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* pervasive.
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*/
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#ifndef CONFIG_XTENSA_ASM2
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void _timer_int_handler(void *arg)
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{
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return ccompare_isr(arg);
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}
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#endif
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int z_clock_driver_init(struct device *device)
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{
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IRQ_CONNECT(TIMER_IRQ, 0, ccompare_isr, 0, 0);
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set_ccompare(ccount() + CYC_PER_TICK);
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irq_enable(TIMER_IRQ);
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return 0;
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}
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void z_clock_set_timeout(s32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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#if defined(CONFIG_TICKLESS_KERNEL) && !defined(CONFIG_QEMU_TICKLESS_WORKAROUND)
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ticks = ticks == K_FOREVER ? MAX_TICKS : ticks;
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ticks = MAX(MIN(ticks - 1, (s32_t)MAX_TICKS), 0);
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k_spinlock_key_t key = k_spin_lock(&lock);
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u32_t curr = ccount(), cyc;
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/* Round up to next tick boundary */
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cyc = ticks * CYC_PER_TICK + (curr - last_count) + (CYC_PER_TICK - 1);
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cyc = (cyc / CYC_PER_TICK) * CYC_PER_TICK;
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cyc += last_count;
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if ((cyc - curr) < MIN_DELAY) {
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cyc += CYC_PER_TICK;
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}
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set_ccompare(cyc);
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k_spin_unlock(&lock, key);
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#endif
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}
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u32_t z_clock_elapsed(void)
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{
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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return 0;
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}
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k_spinlock_key_t key = k_spin_lock(&lock);
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u32_t ret = (ccount() - last_count) / CYC_PER_TICK;
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k_spin_unlock(&lock, key);
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return ret;
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}
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u32_t _timer_cycle_get_32(void)
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{
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return ccount();
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}
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#ifdef CONFIG_SMP
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void smp_timer_init(void)
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{
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set_ccompare(ccount() + CYC_PER_TICK);
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irq_enable(TIMER_IRQ);
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}
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#endif
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