zephyr/soc
Ryan McClelland c5b59282d6 arch: arm: aarch32: add Kconfig for arm cortex-m that implements a cache
The Cache is an optional configuration of both the ARM Cortex-M7 and
Cortex-M55. Previously, it was just checking that it was just an M7
rather than knowing that the CPU actually was built with the cache.

Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
2022-04-14 16:12:03 -05:00
..
arc include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
arm arch: arm: aarch32: add Kconfig for arm cortex-m that implements a cache 2022-04-14 16:12:03 -05:00
arm64 include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
mips soc: mips: add Qemu Malta support 2022-01-19 13:48:21 -05:00
nios2
posix posix: Select CPU_HAS_FPU for POSIX arch 2022-03-24 10:44:38 +01:00
riscv Revert "soc/it8xxx2: enable FPU support" 2022-04-07 10:25:37 -04:00
sparc include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
x86 everywhere: fix typos 2022-03-18 13:24:08 -04:00
xtensa arch/xtensa: Enable backtrace on panic on Intel ADSP platforms 2022-04-14 11:03:40 -04:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00