0369998e61
MIPS (Microprocessor without Interlocked Pipelined Stages) is a instruction set architecture (ISA) developed by MIPS Computer Systems, now MIPS Technologies. This commit provides MIPS architecture support to Zephyr. It is compatible with the MIPS32 Release 1 specification. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
31 lines
446 B
C
31 lines
446 B
C
/*
|
|
* Copyright (c) 2020 Antony Pavlov <antonynpavlov@gmail.com>
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#include <irq.h>
|
|
|
|
#include <tracing/tracing.h>
|
|
|
|
static ALWAYS_INLINE void mips_idle(unsigned int key)
|
|
{
|
|
sys_trace_idle();
|
|
|
|
/* unlock interrupts */
|
|
irq_unlock(key);
|
|
|
|
/* wait for interrupt */
|
|
__asm__ volatile("wait");
|
|
}
|
|
|
|
void arch_cpu_idle(void)
|
|
{
|
|
mips_idle(1);
|
|
}
|
|
|
|
void arch_cpu_atomic_idle(unsigned int key)
|
|
{
|
|
mips_idle(key);
|
|
}
|