4604c45541
This commit enables lots of tests on riscv32 and riscv64 which were previously disabled. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
14 lines
567 B
YAML
14 lines
567 B
YAML
# Excludes m2gl025_miv, which is based on the renode simulator. This
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# is very slow for CPU-bound tests like this, taking upwards of 10
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# minutes (vs. ~20 seconds for qemu) to complete in CI. There's
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# little value there, this is a unit test of library code and we have
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# coverage of the RISC-V architectures via qemu platforms already.
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# Excludes qemu_xtensa due to pathological runtimes which cannot be
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# reproduced on real hardware.
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tests:
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lib.heap:
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tags: heap
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platform_exclude: m2gl025_miv qemu_xtensa
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filter: not CONFIG_SOC_NSIM
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timeout: 480
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