zephyr

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Marc Reilly 54b6d26242 drivers: spi: add spi-bitbang driver This adds an spi master mode driver via bitbanged gpio. Only syncronous transfers are implemented. Clock signal timing is accomplished via busy waits, the gpios are manipulated via the standard gpio interface; these two factors limit the frequency at which it can operate - but here a simple and generic implementation was chosen over performance. The driver supports the various clock polarity and phase configurations, and can also work with word sizes which are non multiples of 8bits, currently up to 16 bits. A sample program is also added demonstrating basic use of the driver with 9bit data words. Signed-off-by: Marc Reilly <marc@cpdesign.com.au>		2021-12-06 07:29:45 -05:00
..
boards
src
CMakeLists.txt
prj.conf
README.rst
sample.yaml

README.rst

.. _spi-bitbang-sample:

SPI-Bitbang Sample
####################

Overview
********

This sample demonstrates using the bitbang SPI driver. The bitbang driver can
be useful for devices which use a non multiple of 8 word size, for example some
LCDs which have an extra cmd/data bit.

This sample loops through some different spi transfer configurations.


Building and Running
********************

The application will build only for a target that has a :ref:`devicetree
<dt-guide>` entry with :dtcompatible:`zephyr,spi-bitbang` as a compatible.

You can connect the MISO and MOSI pins with a wire to provide a basic loopback
test for receive data.

.. zephyr-app-commands::
   :zephyr-app: samples/drivers/spi_bitbang
   :board: nrf52840dk_nrf52840
   :goals: build flash
   :compact:

Sample Output
=============

.. code-block:: console

  *** Booting Zephyr OS build zephyr-v2.6.0-2939-g1882b95b42e2  ***
  basic_write_9bit_words; ret: 0
    wrote 0101 00ff 00a5 0000 0102
  9bit_loopback_partial; ret: 0
   tx (i)  : 0101 0102
   tx (ii) : 0003 0004 0105
   rx (ii) : 0003 0004 0105
  basic_write_9bit_words; ret: 0
   wrote 0101 00ff 00a5 0000 0102
  9bit_loopback_partial; ret: 0
   tx (i)  : 0101 0102
   tx (ii) : 0003 0004 0105
   rx (ii) : 0003 0004 0105
  basic_write_9bit_words; ret: 0
   wrote 0101 00ff 00a5 0000 0102
  9bit_loopback_partial; ret: 0
   tx (i)  : 0101 0102
   tx (ii) : 0003 0004 0105
   rx (ii) : 0003 0004 0105