ac0c0a61d5
Add a new macro MEM_DOMAIN_ALIGN_AND_SIZE for mmu and mpu mem alignment. MEM_DOMAIN_ALIGN_AND_SIZE is - CONFIG_MMU_PAGE_SIZE, when mmu is enabled. - CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE when mpu enabled. Signed-off-by: Jaxson Han <jaxson.han@arm.com>
35 lines
981 B
C
35 lines
981 B
C
/*
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* Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM64_MM_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM64_MM_H_
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#if defined(CONFIG_ARM_MMU)
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#include <arch/arm64/arm_mmu.h>
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/*
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* When mmu enabled, some section addresses need to be aligned with
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* page size which is CONFIG_MMU_PAGE_SIZE
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*/
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#define MEM_DOMAIN_ALIGN_AND_SIZE CONFIG_MMU_PAGE_SIZE
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#elif defined(CONFIG_ARM_MPU)
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#include <arch/arm64/cortex_r/arm_mpu.h>
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/*
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* When mpu enabled, some section addresses need to be aligned with
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* mpu region min align size which is
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* CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
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*/
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#define MEM_DOMAIN_ALIGN_AND_SIZE CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
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#endif
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#ifndef _ASMLANGUAGE
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struct k_thread;
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void z_arm64_thread_mem_domains_init(struct k_thread *thread);
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void z_arm64_swap_mem_domains(struct k_thread *thread);
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM64_MM_H_ */
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