ef4ec43e63
We want to simplify the maintenance burden and confusion of having more than one driver for the same kernel timer peripheral used on all Microchip MEC parts. The XEC version of the driver was converted register definitions in the driver. Register access is performed using Zephyr sys_read/write architecture specific inline routines. Driver DT YAML was updated to use phandle for the 32-bit basic timer used for ARCH_HAS_CUSTOM_BUSY_WAIT support, basic timer max value property, and GIRQ interrtup aggregator hardware information. SoC part Kconfigs, chip level/board level DTSI updated to use the unified driver. Signed-off-by: Scott Worley <scott.worley@microchip.com>
28 lines
615 B
YAML
28 lines
615 B
YAML
# Copyright (c) 2019 Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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description: Microchip XEC RTOS timer
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compatible: "microchip,xec-rtos-timer"
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include: ["base.yaml", "microchip,dmec-ecia-girq.yaml"]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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busy-wait-timer:
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type: phandle
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description: |
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If custom busy wait Kconfig is enabled then this points to the 32-bit
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basic timer node used to implement the 1 MHz busy wait timer.
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clock-frequency:
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type: int
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required: true
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const: 32768
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description: RTOS timer runs at fixed 32 KHz.
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