2c2b2268af
Rely on DT_ANY_INST_HAS_PROP_STATUS_OKAY to only build the gpio handling code for reset pin if this is being used by one or more instance of the device. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
531 lines
13 KiB
C
531 lines
13 KiB
C
/*
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* Copyright (c) 2025 STMicroelectronics.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT sony_imx335
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/video.h>
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#include <zephyr/drivers/video-controls.h>
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#include <zephyr/dt-bindings/video/video-interfaces.h>
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#include <zephyr/logging/log.h>
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#include "video_common.h"
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#include "video_ctrls.h"
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#include "video_device.h"
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LOG_MODULE_REGISTER(video_imx335, CONFIG_VIDEO_LOG_LEVEL);
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#define IMX335_WIDTH 2592
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#define IMX335_HEIGHT 1944
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#define IMX335_PIXEL_RATE 396000000
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struct imx335_config {
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struct i2c_dt_spec i2c;
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#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(reset_gpios)
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struct gpio_dt_spec reset_gpio;
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#endif
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uint32_t input_clk;
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};
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struct imx335_ctrls {
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struct video_ctrl gain;
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struct video_ctrl exposure;
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struct video_ctrl pixel_rate;
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};
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struct imx335_data {
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struct imx335_ctrls ctrls;
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struct video_format fmt;
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};
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#define IMX335_REG8(addr) ((addr) | VIDEO_REG_ADDR16_DATA8)
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#define IMX335_REG16(addr) ((addr) | VIDEO_REG_ADDR16_DATA16_LE)
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#define IMX335_REG24(addr) ((addr) | VIDEO_REG_ADDR16_DATA24_LE)
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#define IMX335_STANDBY IMX335_REG8(0x3000)
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#define IMX335_STANDBY_OPERATING 0x00
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#define IMX335_STANDBY_STANDBY BIT(0)
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#define IMX335_REGHOLD IMX335_REG8(0x3001)
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#define IMX335_XMSTA IMX335_REG8(0x3002)
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#define IMX335_BCWAIT_TIME IMX335_REG8(0x300c)
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#define IMX335_CPWAIT_TIME IMX335_REG8(0x300d)
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#define IMX335_WINMODE IMX335_REG8(0x3018)
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#define IMX335_HTRIMMING_START IMX335_REG16(0x302c)
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#define IMX335_HNUM IMX335_REG16(0x302e)
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#define IMX335_VMAX IMX335_REG24(0x3030)
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#define IMX335_VMAX_DEFAULT 4500
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#define IMX335_OPB_SIZE_V IMX335_REG8(0x304c)
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#define IMX335_ADBIT IMX335_REG8(0x3050)
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#define IMX335_Y_OUT_SIZE IMX335_REG16(0x3056)
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#define IMX335_SHR0 IMX335_REG24(0x3058)
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#define IMX335_SHR0_MIN 9
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#define IMX335_AREA3_ST_ADR_1 IMX335_REG16(0x3074)
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#define IMX335_AREA3_WIDTH_1 IMX335_REG16(0x3076)
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#define IMX335_GAIN IMX335_REG16(0x30e8)
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#define IMX335_GAIN_MIN (0 * 1000)
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#define IMX335_GAIN_MAX (72 * 1000)
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#define IMX335_GAIN_UNIT_MDB 300
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#define IMX335_INCKSEL1 IMX335_REG16(0x314c)
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#define IMX335_INCKSEL2_PLL_IF_GC IMX335_REG8(0x315a)
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#define IMX335_INCKSEL3 IMX335_REG8(0x3168)
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#define IMX335_INCKSEL4 IMX335_REG8(0x316a)
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#define IMX335_MDBIT IMX335_REG8(0x319d)
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#define IMX335_XVS_XHS_DRV IMX335_REG8(0x31a1)
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#define IMX335_ADBIT1 IMX335_REG16(0x341c)
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#define IMX335_LANEMODE IMX335_REG8(0x3a01)
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static const struct video_reg imx335_init_params[] = {
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{IMX335_STANDBY, 0x01},
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{IMX335_XMSTA, 0x00},
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{IMX335_WINMODE, 0x04},
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{IMX335_HTRIMMING_START, 0x3c},
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{IMX335_HNUM, 0x0a20},
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{IMX335_OPB_SIZE_V, 0x00},
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{IMX335_Y_OUT_SIZE, 0x0798},
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{IMX335_AREA3_ST_ADR_1, 0x00c8},
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{IMX335_AREA3_WIDTH_1, 0x0f30},
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{IMX335_XVS_XHS_DRV, 0x00},
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};
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static const struct video_reg16 imx335_fixed_regs[] = {
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{0x3288, 0x21},
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{0x328a, 0x02},
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{0x3414, 0x05},
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{0x3416, 0x18},
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{0x3648, 0x01},
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{0x364a, 0x04},
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{0x364c, 0x04},
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{0x3678, 0x01},
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{0x367c, 0x31},
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{0x367e, 0x31},
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{0x3706, 0x10},
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{0x3708, 0x03},
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{0x3714, 0x02},
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{0x3715, 0x02},
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{0x3716, 0x01},
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{0x3717, 0x03},
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{0x371c, 0x3d},
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{0x371d, 0x3f},
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{0x372c, 0x00},
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{0x372d, 0x00},
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{0x372e, 0x46},
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{0x372f, 0x00},
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{0x3730, 0x89},
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{0x3731, 0x00},
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{0x3732, 0x08},
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{0x3733, 0x01},
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{0x3734, 0xfe},
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{0x3735, 0x05},
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{0x3740, 0x02},
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{0x375d, 0x00},
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{0x375e, 0x00},
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{0x375f, 0x11},
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{0x3760, 0x01},
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{0x3768, 0x1b},
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{0x3769, 0x1b},
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{0x376a, 0x1b},
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{0x376b, 0x1b},
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{0x376c, 0x1a},
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{0x376d, 0x17},
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{0x376e, 0x0f},
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{0x3776, 0x00},
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{0x3777, 0x00},
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{0x3778, 0x46},
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{0x3779, 0x00},
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{0x377a, 0x89},
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{0x377b, 0x00},
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{0x377c, 0x08},
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{0x377d, 0x01},
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{0x377e, 0x23},
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{0x377f, 0x02},
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{0x3780, 0xd9},
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{0x3781, 0x03},
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{0x3782, 0xf5},
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{0x3783, 0x06},
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{0x3784, 0xa5},
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{0x3788, 0x0f},
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{0x378a, 0xd9},
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{0x378b, 0x03},
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{0x378c, 0xeb},
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{0x378d, 0x05},
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{0x378e, 0x87},
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{0x378f, 0x06},
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{0x3790, 0xf5},
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{0x3792, 0x43},
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{0x3794, 0x7a},
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{0x3796, 0xa1},
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{0x37b0, 0x36},
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{0x3a00, 0x01},
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};
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static const struct video_reg imx335_mode_2l_10b[] = {
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{IMX335_ADBIT, 0x00},
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{IMX335_MDBIT, 0x00},
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{IMX335_ADBIT1, 0x01ff},
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{IMX335_LANEMODE, 0x01},
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};
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static const struct video_reg imx335_inck_74mhz[] = {
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{IMX335_BCWAIT_TIME, 0xb6},
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{IMX335_CPWAIT_TIME, 0x7f},
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{IMX335_INCKSEL1, 0x80},
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{IMX335_INCKSEL2_PLL_IF_GC, 0x03},
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{IMX335_INCKSEL3, 0x68},
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{IMX335_INCKSEL4, 0x7f},
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};
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static const struct video_reg imx335_inck_27mhz[] = {
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{IMX335_BCWAIT_TIME, 0x42},
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{IMX335_CPWAIT_TIME, 0x2e},
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{IMX335_INCKSEL1, 0xb0},
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{IMX335_INCKSEL2_PLL_IF_GC, 0x02},
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{IMX335_INCKSEL3, 0x8f},
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{IMX335_INCKSEL4, 0x7e},
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};
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static const struct video_reg imx335_inck_24mhz[] = {
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{IMX335_BCWAIT_TIME, 0x3b},
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{IMX335_CPWAIT_TIME, 0x2a},
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{IMX335_INCKSEL1, 0xc6},
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{IMX335_INCKSEL2_PLL_IF_GC, 0x02},
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{IMX335_INCKSEL3, 0xa0},
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{IMX335_INCKSEL4, 0x7e},
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};
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static const struct video_reg imx335_inck_18mhz[] = {
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{IMX335_BCWAIT_TIME, 0x2d},
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{IMX335_CPWAIT_TIME, 0x1f},
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{IMX335_INCKSEL1, 0x84},
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{IMX335_INCKSEL2_PLL_IF_GC, 0x01},
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{IMX335_INCKSEL3, 0x6b},
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{IMX335_INCKSEL4, 0x7d},
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};
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static const struct video_reg imx335_inck_6mhz[] = {
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{IMX335_BCWAIT_TIME, 0x0f},
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{IMX335_CPWAIT_TIME, 0x0b},
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{IMX335_INCKSEL1, 0xc6},
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{IMX335_INCKSEL2_PLL_IF_GC, 0x00},
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{IMX335_INCKSEL3, 0xa0},
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{IMX335_INCKSEL4, 0x7c},
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};
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static const struct video_format_cap imx335_fmts[] = {
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{
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.pixelformat = VIDEO_PIX_FMT_SRGGB10P,
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.width_min = IMX335_WIDTH,
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.width_max = IMX335_WIDTH,
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.height_min = IMX335_HEIGHT,
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.height_max = IMX335_HEIGHT,
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.width_step = 0,
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.height_step = 0,
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},
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{0}
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};
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static int imx335_set_fmt(const struct device *dev, struct video_format *fmt)
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{
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/*
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* Only support RGGB10 for now and resolution is fixed hence only check
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* values here
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*/
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if (fmt->pixelformat != VIDEO_PIX_FMT_SRGGB10P ||
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fmt->width != IMX335_WIDTH ||
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fmt->height != IMX335_HEIGHT) {
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LOG_ERR("Unsupported pixel format or resolution");
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return -ENOTSUP;
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}
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return 0;
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}
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static int imx335_get_fmt(const struct device *dev, struct video_format *fmt)
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{
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struct imx335_data *drv_data = dev->data;
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*fmt = drv_data->fmt;
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return 0;
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}
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static int imx335_get_caps(const struct device *dev, struct video_caps *caps)
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{
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caps->format_caps = imx335_fmts;
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return 0;
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}
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static int imx335_set_stream(const struct device *dev, bool enable, enum video_buf_type type)
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{
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const struct imx335_config *cfg = dev->config;
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int ret;
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ret = video_write_cci_reg(&cfg->i2c, IMX335_STANDBY,
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enable ? IMX335_STANDBY_OPERATING : IMX335_STANDBY_STANDBY);
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if (ret) {
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LOG_ERR("Failed to set standby register\n");
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return ret;
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}
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k_sleep(K_USEC(20));
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return 0;
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}
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static int imx335_set_ctrl_gain(const struct device *dev)
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{
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const struct imx335_config *cfg = dev->config;
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struct imx335_data *drv_data = dev->data;
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struct imx335_ctrls *ctrls = &drv_data->ctrls;
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int ret;
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ret = video_write_cci_reg(&cfg->i2c, IMX335_REGHOLD, 1);
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if (ret) {
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return ret;
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}
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/* Apply gain upon conversion to gain unit */
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ret = video_write_cci_reg(&cfg->i2c, IMX335_GAIN, ctrls->gain.val / IMX335_GAIN_UNIT_MDB);
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if (ret) {
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return ret;
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}
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return video_write_cci_reg(&cfg->i2c, IMX335_REGHOLD, 0);
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}
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static int imx335_set_ctrl_exposure(const struct device *dev)
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{
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const struct imx335_config *cfg = dev->config;
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struct imx335_data *drv_data = dev->data;
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struct imx335_ctrls *ctrls = &drv_data->ctrls;
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int ret;
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ret = video_write_cci_reg(&cfg->i2c, IMX335_REGHOLD, 1);
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if (ret) {
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return ret;
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}
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/* Since we never update VMAX, we can use the default value directly */
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ret = video_write_cci_reg(&cfg->i2c, IMX335_SHR0,
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IMX335_VMAX_DEFAULT - ctrls->exposure.val);
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if (ret) {
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return ret;
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}
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return video_write_cci_reg(&cfg->i2c, IMX335_REGHOLD, 0);
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}
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static int imx335_set_ctrl(const struct device *dev, unsigned int cid)
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{
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switch (cid) {
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case VIDEO_CID_ANALOGUE_GAIN:
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return imx335_set_ctrl_gain(dev);
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case VIDEO_CID_EXPOSURE:
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return imx335_set_ctrl_exposure(dev);
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default:
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return -ENOTSUP;
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}
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}
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static int imx335_get_frmival(const struct device *dev, struct video_frmival *frmival)
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{
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/* Only 30fps is supported right now */
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frmival->numerator = 1;
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frmival->denominator = 30;
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return 0;
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}
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static int imx335_enum_frmival(const struct device *dev, struct video_frmival_enum *fie)
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{
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if (fie->index > 0) {
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return -EINVAL;
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}
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fie->type = VIDEO_FRMIVAL_TYPE_DISCRETE;
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fie->discrete.numerator = 1;
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fie->discrete.denominator = 30;
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return 0;
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}
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static DEVICE_API(video, imx335_driver_api) = {
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.set_format = imx335_set_fmt,
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.get_format = imx335_get_fmt,
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.get_caps = imx335_get_caps,
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.set_stream = imx335_set_stream,
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.set_ctrl = imx335_set_ctrl,
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/* frmival is fixed, hence set/get_frmival both return 30fps */
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.set_frmival = imx335_get_frmival,
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.get_frmival = imx335_get_frmival,
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.enum_frmival = imx335_enum_frmival,
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};
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static int imx335_set_input_clk(const struct device *dev, uint32_t rate)
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{
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const struct imx335_config *cfg = dev->config;
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int ret;
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switch (rate) {
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case MHZ(74):
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ret = video_write_cci_multiregs(&cfg->i2c, imx335_inck_74mhz,
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ARRAY_SIZE(imx335_inck_74mhz));
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break;
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case MHZ(27):
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ret = video_write_cci_multiregs(&cfg->i2c, imx335_inck_27mhz,
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ARRAY_SIZE(imx335_inck_27mhz));
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break;
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case MHZ(24):
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ret = video_write_cci_multiregs(&cfg->i2c, imx335_inck_24mhz,
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ARRAY_SIZE(imx335_inck_24mhz));
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break;
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case MHZ(18):
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ret = video_write_cci_multiregs(&cfg->i2c, imx335_inck_18mhz,
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ARRAY_SIZE(imx335_inck_18mhz));
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break;
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case MHZ(6):
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ret = video_write_cci_multiregs(&cfg->i2c, imx335_inck_6mhz,
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ARRAY_SIZE(imx335_inck_6mhz));
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break;
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default:
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LOG_ERR("Unsupported inck freq (%d)\n", rate);
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ret = -EINVAL;
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}
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return ret;
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}
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static int imx335_init_controls(const struct device *dev)
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{
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int ret;
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struct imx335_data *drv_data = dev->data;
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struct imx335_ctrls *ctrls = &drv_data->ctrls;
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ret = video_init_ctrl(
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&ctrls->gain, dev, VIDEO_CID_ANALOGUE_GAIN,
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(struct video_ctrl_range){
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.min = IMX335_GAIN_MIN,
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.max = IMX335_GAIN_MAX,
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.step = IMX335_GAIN_UNIT_MDB,
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.def = 0});
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if (ret) {
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return ret;
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}
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ret = video_init_ctrl(
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&ctrls->exposure, dev, VIDEO_CID_EXPOSURE,
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(struct video_ctrl_range){
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.min = 1,
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.max = IMX335_VMAX_DEFAULT - IMX335_SHR0_MIN,
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.step = 1,
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.def = IMX335_VMAX_DEFAULT - IMX335_SHR0_MIN});
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if (ret) {
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return ret;
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}
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return video_init_ctrl(
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&ctrls->pixel_rate, dev, VIDEO_CID_PIXEL_RATE,
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(struct video_ctrl_range){
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.min64 = IMX335_PIXEL_RATE,
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.max64 = IMX335_PIXEL_RATE,
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.step64 = 1,
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.def64 = IMX335_PIXEL_RATE});
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}
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static int imx335_init(const struct device *dev)
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{
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const struct imx335_config *cfg = dev->config;
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int ret;
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if (!device_is_ready(cfg->i2c.bus)) {
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LOG_ERR("Bus device is not ready");
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return -ENODEV;
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}
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#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(reset_gpios)
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if (cfg->reset_gpio.port != NULL) {
|
|
if (!gpio_is_ready_dt(&cfg->reset_gpio)) {
|
|
LOG_ERR("%s: device %s is not ready", dev->name,
|
|
cfg->reset_gpio.port->name);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* Power up sequence */
|
|
ret = gpio_pin_configure_dt(&cfg->reset_gpio, GPIO_OUTPUT_ACTIVE);
|
|
if (ret) {
|
|
return ret;
|
|
}
|
|
|
|
k_sleep(K_NSEC(500)); /* Tlow */
|
|
|
|
gpio_pin_set_dt(&cfg->reset_gpio, 0);
|
|
|
|
k_sleep(K_USEC(600)); /* T4 */
|
|
}
|
|
#endif
|
|
|
|
/* Initialize register values */
|
|
ret = video_write_cci_multiregs(&cfg->i2c, imx335_init_params,
|
|
ARRAY_SIZE(imx335_init_params));
|
|
if (ret) {
|
|
LOG_ERR("Unable to initialize the sensor");
|
|
return ret;
|
|
}
|
|
|
|
/* Apply the fixed value registers */
|
|
ret = video_write_cci_multiregs16(&cfg->i2c, imx335_fixed_regs,
|
|
ARRAY_SIZE(imx335_fixed_regs));
|
|
if (ret) {
|
|
LOG_ERR("Unable to initialize the sensor");
|
|
return ret;
|
|
}
|
|
|
|
/* TODO - Only 10bit - 2 data lanes mode is supported for the time being */
|
|
ret = video_write_cci_multiregs(&cfg->i2c, imx335_mode_2l_10b,
|
|
ARRAY_SIZE(imx335_mode_2l_10b));
|
|
if (ret) {
|
|
LOG_ERR("Unable to initialize the sensor");
|
|
return ret;
|
|
}
|
|
|
|
ret = imx335_set_input_clk(dev, cfg->input_clk);
|
|
if (ret) {
|
|
LOG_ERR("Unable to configure INCK");
|
|
return ret;
|
|
}
|
|
|
|
return imx335_init_controls(dev);
|
|
}
|
|
|
|
#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(reset_gpios)
|
|
#define IMX335_GET_RESET_GPIO(n) .reset_gpio = GPIO_DT_SPEC_INST_GET_OR(n, reset_gpios, {0}),
|
|
#else
|
|
#define IMX335_GET_RESET_GPIO(n)
|
|
#endif
|
|
|
|
#define IMX335_INIT(n) \
|
|
static struct imx335_data imx335_data_##n = { \
|
|
.fmt = { \
|
|
.pixelformat = VIDEO_PIX_FMT_SRGGB10P, \
|
|
.width = IMX335_WIDTH, \
|
|
.height = IMX335_HEIGHT, \
|
|
}, \
|
|
}; \
|
|
static const struct imx335_config imx335_cfg_##n = { \
|
|
.i2c = I2C_DT_SPEC_INST_GET(n), \
|
|
IMX335_GET_RESET_GPIO(n) \
|
|
.input_clk = DT_INST_PROP_BY_PHANDLE(n, clocks, clock_frequency), \
|
|
}; \
|
|
\
|
|
DEVICE_DT_INST_DEFINE(n, &imx335_init, NULL, &imx335_data_##n, &imx335_cfg_##n, \
|
|
POST_KERNEL, CONFIG_VIDEO_INIT_PRIORITY, &imx335_driver_api); \
|
|
\
|
|
VIDEO_DEVICE_DEFINE(imx335_##n, DEVICE_DT_INST_GET(n), NULL);
|
|
|
|
DT_INST_FOREACH_STATUS_OKAY(IMX335_INIT)
|