Adding support for low power timer to enable low power modes Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
187 lines
5.5 KiB
C
187 lines
5.5 KiB
C
/*
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* Copyright (c) 2025 Cypress Semiconductor Corporation (an Infineon company) or
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* an affiliate of Cypress Semiconductor Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief Low Power timer driver for Infineon CAT1 MCU family.
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*/
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#define DT_DRV_COMPAT infineon_cat1_lp_timer
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#include <zephyr/device.h>
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#include <zephyr/drivers/timer/system_timer.h>
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#include <zephyr/irq.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/sys_clock.h>
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#include <zephyr/drivers/gpio.h>
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#include <cyhal_lptimer.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(ifx_cat1_lp_timer, CONFIG_KERNEL_LOG_LEVEL);
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/* The application only needs one lptimer. Report an error if more than one is selected. */
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#if DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 1
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#error Only one LPTIMER instance should be enabled
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#endif
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#define LPTIMER_INTR_PRIORITY (3u)
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#define LPTIMER_FREQ (32768u)
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/* We need to know the number of MCWDT instances. Unfortunately, this information is not available
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* in a header in the HAL code. This was extracted from the cyhal_lptimer.c file in the HAL
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*/
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#if (defined(CY_IP_MXS40SRSS) || defined(CY_IP_MXS40SSRSS) || defined(CY_IP_MXS28SRSS) || \
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defined(CY_IP_MXS22SRSS)) && \
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!((defined(CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)) || \
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((SRSS_NUM_MCWDT_B) > 0))
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#define NUM_LPTIMERS SRSS_NUM_MCWDT
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#else
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#error "Selected device doesn't support low power timers at this time."
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#endif
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cyhal_lptimer_t lptimer_obj;
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static uint32_t last_lptimer_value;
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static struct k_spinlock lock;
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static void lptimer_interrupt_handler(void *handler_arg, cyhal_lptimer_event_t event)
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{
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CY_UNUSED_PARAMETER(handler_arg);
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CY_UNUSED_PARAMETER(event);
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k_spinlock_key_t key = k_spin_lock(&lock);
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/* announce the elapsed time in ms */
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uint32_t lptimer_value = cyhal_lptimer_read(&lptimer_obj);
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uint32_t delta_ticks =
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((uint64_t)(lptimer_value - last_lptimer_value) * CONFIG_SYS_CLOCK_TICKS_PER_SEC) /
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LPTIMER_FREQ;
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sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? delta_ticks : (delta_ticks > 0));
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last_lptimer_value += (delta_ticks * LPTIMER_FREQ) / CONFIG_SYS_CLOCK_TICKS_PER_SEC;
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k_spin_unlock(&lock, key);
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}
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void sys_clock_set_timeout(int32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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k_spinlock_key_t key = {0};
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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return;
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}
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if (ticks == K_TICKS_FOREVER) {
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key = k_spin_lock(&lock);
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/* Disable the LPTIMER events */
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cyhal_lptimer_enable_event(&lptimer_obj, CYHAL_LPTIMER_COMPARE_MATCH,
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LPTIMER_INTR_PRIORITY, false);
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k_spin_unlock(&lock, key);
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return;
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}
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/* passing ticks==1 means "announce the next tick", ticks value of zero (or even negative)
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* is legal and treated identically: it simply indicates the kernel would like the next
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* tick announcement as soon as possible.
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*/
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if (ticks < 1) {
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ticks = 1;
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}
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uint32_t set_ticks = ((uint32_t)(ticks)*LPTIMER_FREQ) / CONFIG_SYS_CLOCK_TICKS_PER_SEC;
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key = k_spin_lock(&lock);
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/* Configure and Enable the LPTIMER events */
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cyhal_lptimer_enable_event(&lptimer_obj, CYHAL_LPTIMER_COMPARE_MATCH, LPTIMER_INTR_PRIORITY,
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true);
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/* Set the delay value for the next wakeup interrupt */
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cyhal_lptimer_set_delay(&lptimer_obj, set_ticks);
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k_spin_unlock(&lock, key);
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}
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uint32_t sys_clock_elapsed(void)
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{
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if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
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return 0;
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}
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint32_t lptimer_value = cyhal_lptimer_read(&lptimer_obj);
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k_spin_unlock(&lock, key);
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/* gives the value of LPTIM counter (ms) since the previous 'announce' */
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uint64_t ret = (((uint64_t)(lptimer_value - last_lptimer_value)) *
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CONFIG_SYS_CLOCK_TICKS_PER_SEC) /
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LPTIMER_FREQ;
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return (uint32_t)ret;
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}
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uint32_t sys_clock_cycle_get_32(void)
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{
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/* just gives the accumulated count in a number of hw cycles */
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k_spinlock_key_t key = k_spin_lock(&lock);
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uint32_t lp_time = cyhal_lptimer_read(&lptimer_obj);
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k_spin_unlock(&lock, key);
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/* convert lptim count in a nb of hw cycles with precision */
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uint64_t ret = ((uint64_t)lp_time * sys_clock_hw_cycles_per_sec()) / LPTIMER_FREQ;
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/* convert in hw cycles (keeping 32bit value) */
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return (uint32_t)ret;
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}
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static int sys_clock_driver_init(void)
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{
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cy_rslt_t result;
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cyhal_lptimer_t lptimer_objs[NUM_LPTIMERS];
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/* Currently with the HAL, there is no way to directly/explicitly select the MCWDT
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* enabled in the <board>.dts file. So, instead, initialize LPTIMERs until we find
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* the one from the <board>.dts file. Free the others when done.
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*/
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for (int32_t lptimer_index = 0; lptimer_index < NUM_LPTIMERS; lptimer_index++) {
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/* Initialize the LPTIMER with default configuration */
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result = cyhal_lptimer_init(&lptimer_obj);
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if (result != CY_RSLT_SUCCESS) {
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LOG_ERR("LPTimer instance not found. Error: 0x%08X\n",
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(unsigned int)result);
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return -EIO;
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}
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if ((uint32_t)lptimer_obj.base == DT_INST_REG_ADDR(0)) {
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for (lptimer_index--; lptimer_index >= 0; lptimer_index--) {
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cyhal_lptimer_free(&lptimer_objs[lptimer_index]);
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}
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break;
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}
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cyhal_lptimer_free(&lptimer_obj);
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cyhal_lptimer_init(&lptimer_objs[lptimer_index]);
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}
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/* Register the callback handler which will be invoked when the interrupt triggers */
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cyhal_lptimer_register_callback(&lptimer_obj, lptimer_interrupt_handler, NULL);
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if (result != CY_RSLT_SUCCESS) {
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LOG_ERR("Sys Clock initialization failed. Error: 0x%08X\n", (unsigned int)result);
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return -EIO;
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}
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return 0;
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}
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2, CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
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