4342d7108b
The Xilinx AXI Ethernet subsystem is commonly found in FPGA designs. This patch adds a driver and device tree bindings for the Ethernet MAC core and its MDIO controller. The driver was tested on a RISC-V softcore in an FPGA design, with an RGMII phy and Ethernet subsystem version 7.2 Rev. 14. Device tree bindings match the device tree generated by Vitis hsi. Note that Vitis generates one of the two included compatible strings depending on version. Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
42 lines
1.6 KiB
Plaintext
42 lines
1.6 KiB
Plaintext
#
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#Xilinx AXI 1G / 2.5G Ethernet Subsystem
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#
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#Copyright(c) 2024, CISPA Helmholtz Center for Information Security
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#SPDX-License-Identifier: Apache-2.0
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#
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config ETH_XILINX_AXIENET
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bool "Xilinx AXI Ethernet Driver"
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default y
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depends on DT_HAS_XLNX_AXI_ETHERNET_1_00_A_ENABLED
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depends on DMA_XILINX_AXI_DMA
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help
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Enable Xilinx 1G / 2.5G AXI Ethernet driver,
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commonly found on FPGAs.
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config ETH_XILINX_AXIENET_BUFFER_NUM_TX
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int "Number of buffers for concurrent transmission (TX)."
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depends on ETH_XILINX_AXIENET
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default DMA_XILINX_AXI_DMA_SG_DESCRIPTOR_NUM_TX
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range 2 DMA_XILINX_AXI_DMA_SG_DESCRIPTOR_NUM_TX
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help
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Number of buffers for transmission allocated in the Xilinx AXI Ethernet driver.
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This limits how many transmissions can be in-flight at the same time.
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This cannot exceed the number of available TX buffers in the AXI DMA. However,
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in scenarios with multiple AXI DMAs for different purposes in the system, it
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may be desirable to reduce the number of concurrent transmissions to conserve
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resources.
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config ETH_XILINX_AXIENET_BUFFER_NUM_RX
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int "Number of buffers for concurrent reception (RX)."
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depends on ETH_XILINX_AXIENET
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default DMA_XILINX_AXI_DMA_SG_DESCRIPTOR_NUM_RX
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range 2 DMA_XILINX_AXI_DMA_SG_DESCRIPTOR_NUM_RX
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help
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Number of buffers for reception allocated in the Xilinx AXI Ethernet driver.
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This limits how many transmissions can be in-flight at the same time.
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This cannot exceed the number of available RX buffers in the AXI DMA. However,
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in scenarios with multiple AXI DMAs for different purposes in the system, it
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may be desirable to reduce the number of concurrent transmissions to conserve
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resources.
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