613ee72670
Migrate renesas,ra-agt-counter implementation to use hal_renesas. Add additional AGT_CLOCK_SUBCLOCK count source. Add constraint for counter resolution to 32 or 16 bit variant. Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
600 lines
17 KiB
C
600 lines
17 KiB
C
/*
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* Copyright (c) 2024-2025 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_ra_agt_counter
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#include <soc.h>
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#include <zephyr/kernel.h>
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#include <zephyr/irq.h>
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#include <zephyr/drivers/counter.h>
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#include "r_agt.h"
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#include "rp_agt.h"
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(counter_renesas_ra_agt, CONFIG_COUNTER_LOG_LEVEL);
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struct counter_renesas_ra_agt_config {
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struct counter_config_info info;
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void (*irq_config_func)(void);
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};
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struct counter_renesas_ra_agt_data {
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struct st_agt_instance_ctrl agt_ctrl;
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struct st_timer_cfg agt_cfg;
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struct st_agt_extended_cfg agt_extend_cfg;
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IRQn_Type agtcmai_irq;
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uint8_t agtcmai_ipl;
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uint32_t guard_period;
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counter_alarm_callback_t alarm_cb;
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counter_top_callback_t top_cb;
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void *alarm_data;
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void *top_data;
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struct k_spinlock lock;
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};
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extern void agt_int_isr(void);
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extern void agtcmai_isr(void);
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static inline bool renesas_ra_agt_is_running(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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return data->agt_ctrl.is_agtw ? (data->agt_ctrl.p_reg->AGT32.CTRL.AGTCR_b.TCSTF == 1)
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: (data->agt_ctrl.p_reg->AGT16.CTRL.AGTCR_b.TCSTF == 1);
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}
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static inline int renesas_ra_agt_period_set(const struct device *dev, uint32_t period)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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const bool counting = renesas_ra_agt_is_running(dev);
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fsp_err_t err;
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if (counting) {
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err = R_AGT_Stop(&data->agt_ctrl);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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}
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err = R_AGT_PeriodSet(&data->agt_ctrl, period);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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if (counting) {
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err = R_AGT_Start(&data->agt_ctrl);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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}
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return 0;
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}
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static inline int renesas_ra_agt_compare_match_set(const struct device *dev, uint32_t val)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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const bool counting = renesas_ra_agt_is_running(dev);
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fsp_err_t err;
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if (counting) {
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err = R_AGT_Stop(&data->agt_ctrl);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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}
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err = RP_AGT_CompareMatchSet(&data->agt_ctrl, val, TIMER_COMPARE_MATCH_A);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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if (counting) {
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err = R_AGT_Start(&data->agt_ctrl);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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}
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return 0;
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}
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static inline k_spinlock_key_t counter_renesas_ra_agt_lock(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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return k_spin_lock(&data->lock);
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}
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static inline void counter_renesas_ra_agt_unlock(const struct device *dev, k_spinlock_key_t key)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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k_spin_unlock(&data->lock, key);
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}
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static int counter_renesas_ra_agt_start(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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fsp_err_t err;
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err = R_AGT_Start(&data->agt_ctrl);
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if (err != FSP_SUCCESS) {
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LOG_DBG("Counter start failed");
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return -EIO;
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}
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return 0;
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}
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static int counter_renesas_ra_agt_stop(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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fsp_err_t err;
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err = R_AGT_Stop(&data->agt_ctrl);
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if (err != FSP_SUCCESS) {
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LOG_DBG("Counter stop failed");
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return -EIO;
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}
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return 0;
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}
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static int counter_renesas_ra_agt_get_value(const struct device *dev, uint32_t *ticks)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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timer_status_t status;
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fsp_err_t err;
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err = R_AGT_StatusGet(&data->agt_ctrl, &status);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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*ticks = status.counter;
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return 0;
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}
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static uint32_t counter_renesas_ra_agt_get_top_value(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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return data->agt_ctrl.period;
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}
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static int counter_renesas_ra_agt_set_top_value(const struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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const struct counter_renesas_ra_agt_config *config = dev->config;
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struct counter_renesas_ra_agt_data *data = dev->data;
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k_spinlock_key_t key = counter_renesas_ra_agt_lock(dev);
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bool reset = false;
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uint32_t now = 0;
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fsp_err_t err;
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int ret = 0;
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if (cfg->ticks > config->info.max_top_value) {
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LOG_DBG("Top value exceed maximum value");
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ret = -EINVAL;
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goto out;
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}
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ret = renesas_ra_agt_period_set(dev, cfg->ticks);
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if (ret != 0) {
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LOG_DBG("Counter period set failed");
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goto out;
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}
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if (cfg->callback != NULL) {
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if (data->agt_cfg.cycle_end_irq == BSP_IRQ_DISABLED) {
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ret = -ENOTSUP;
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goto out;
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}
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irq_enable(data->agt_cfg.cycle_end_irq);
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} else {
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if (data->agt_cfg.cycle_end_ipl != BSP_IRQ_DISABLED) {
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irq_disable(data->agt_cfg.cycle_end_irq);
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}
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}
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data->top_cb = cfg->callback;
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data->top_data = cfg->user_data;
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if ((cfg->flags & COUNTER_TOP_CFG_DONT_RESET) == 0) {
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reset = true;
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} else if ((cfg->flags & COUNTER_TOP_CFG_RESET_WHEN_LATE) != 0) {
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ret = counter_renesas_ra_agt_get_value(dev, &now);
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if (ret != 0) {
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goto out;
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}
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reset = cfg->ticks < now;
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} else {
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;
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}
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if (reset) {
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err = R_AGT_Reset(&data->agt_ctrl);
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if (err != FSP_SUCCESS) {
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LOG_DBG("Counter reset failed");
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ret = -EIO;
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goto out;
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}
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}
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out:
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counter_renesas_ra_agt_unlock(dev, key);
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return ret;
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}
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static inline uint32_t ticks_sub(uint32_t val, uint32_t old, uint32_t top)
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{
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if (likely(IS_BIT_MASK(top))) {
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return (val - old) & top;
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}
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/* if top is not 2^n-1 */
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return (val >= old) ? (val - old) : val + top + 1 - old;
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}
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static int renesas_ra_agt_abs_alarm_set(const struct device *dev, uint32_t val, uint32_t top,
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bool irq_on_late)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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uint32_t max_val;
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uint32_t read_again;
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fsp_err_t err;
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int ret;
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ret = renesas_ra_agt_compare_match_set(dev, val);
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if (ret != 0) {
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return ret;
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}
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ret = counter_renesas_ra_agt_get_value(dev, &read_again);
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if (ret != 0) {
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return ret;
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}
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max_val = ticks_sub(read_again + top, data->guard_period, top);
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if (val > max_val) {
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if (irq_on_late) {
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NVIC_SetPendingIRQ(data->agtcmai_irq);
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} else {
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data->alarm_cb = NULL;
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}
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ret = -ETIME;
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}
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err = RP_AGT_EventSet(&data->agt_ctrl, TIMER_AGT_AGTCMAI, true);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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irq_enable(data->agtcmai_irq);
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return ret;
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}
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static int renesas_ra_agt_rel_alarm_set(const struct device *dev, uint32_t val, uint32_t top,
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bool irq_on_late)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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uint32_t max_rel_val = irq_on_late ? (top / 2) : top;
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uint32_t diff;
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uint32_t now;
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fsp_err_t err;
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int ret;
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ret = counter_renesas_ra_agt_get_value(dev, &now);
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if (ret != 0) {
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return ret;
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}
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val = ticks_sub(now, val, top);
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ret = renesas_ra_agt_compare_match_set(dev, val);
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if (ret != 0) {
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return ret;
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}
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ret = counter_renesas_ra_agt_get_value(dev, &now);
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if (ret != 0) {
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return ret;
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}
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diff = ticks_sub(now, val, top);
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if (diff > max_rel_val || diff == 0) {
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if (irq_on_late) {
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NVIC_SetPendingIRQ(data->agtcmai_irq);
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} else {
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data->alarm_cb = NULL;
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}
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}
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err = RP_AGT_EventSet(&data->agt_ctrl, TIMER_AGT_AGTCMAI, true);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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irq_enable(data->agtcmai_irq);
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return 0;
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}
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static int counter_renesas_ra_agt_set_alarm(const struct device *dev, uint8_t chan,
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const struct counter_alarm_cfg *alarm_cfg)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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const uint32_t top = counter_renesas_ra_agt_get_top_value(dev);
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const bool absolute = (alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) != 0;
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const bool irq_on_late =
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absolute ? (alarm_cfg->flags & COUNTER_ALARM_CFG_EXPIRE_WHEN_LATE) != 0
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: alarm_cfg->ticks < (top / 2);
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int ret = 0;
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if (chan != 0) {
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ret = -EINVAL;
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goto out;
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}
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if (alarm_cfg->ticks > top) {
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ret = -EINVAL;
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goto out;
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}
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if (data->alarm_cb != NULL) {
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ret = -EBUSY;
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goto out;
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}
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if (data->agtcmai_irq == BSP_IRQ_DISABLED) {
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return -ENOTSUP;
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}
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data->alarm_cb = alarm_cfg->callback;
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data->alarm_data = alarm_cfg->user_data;
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if (absolute) {
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ret = renesas_ra_agt_abs_alarm_set(dev, alarm_cfg->ticks, top, irq_on_late);
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} else {
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ret = renesas_ra_agt_rel_alarm_set(dev, alarm_cfg->ticks, top, irq_on_late);
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}
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out:
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return ret;
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}
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static int counter_renesas_ra_agt_cancel_alarm(const struct device *dev, uint8_t chan)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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k_spinlock_key_t key = counter_renesas_ra_agt_lock(dev);
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fsp_err_t err;
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int ret = 0;
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if (data->agtcmai_irq == BSP_IRQ_DISABLED) {
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return -ENOTSUP;
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}
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err = RP_AGT_EventSet(&data->agt_ctrl, TIMER_AGT_AGTCMAI, false);
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if (err != FSP_SUCCESS) {
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ret = -EIO;
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goto out;
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}
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irq_disable(data->agtcmai_irq);
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NVIC_ClearPendingIRQ(data->agtcmai_irq);
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data->alarm_cb = NULL;
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data->alarm_data = NULL;
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out:
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counter_renesas_ra_agt_unlock(dev, key);
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return 0;
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}
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static uint32_t counter_renesas_ra_agt_get_guard_period(const struct device *dev, uint32_t flags)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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return data->guard_period;
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}
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static int counter_renesas_ra_agt_set_guard_period(const struct device *dev, uint32_t guard,
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uint32_t flags)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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k_spinlock_key_t key = counter_renesas_ra_agt_lock(dev);
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int ret = 0;
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if (counter_renesas_ra_agt_get_top_value(dev) < guard) {
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LOG_DBG("Invalid guard rate");
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ret = -EINVAL;
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goto out;
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}
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data->guard_period = guard;
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out:
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counter_renesas_ra_agt_unlock(dev, key);
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return 0;
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}
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static uint32_t counter_renesas_ra_agt_get_pending_int(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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uint8_t event = 0;
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fsp_err_t err;
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err = RP_AGT_EventGet(&data->agt_ctrl, &event);
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if (err != FSP_SUCCESS) {
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LOG_DBG("Counter get status failed");
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return 0;
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}
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return (uint32_t)!!(
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event & (R_AGTX0_AGT16_CTRL_AGTCR_TCMAF_Msk | R_AGTX0_AGT16_CTRL_AGTCR_TUNDF_Msk));
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}
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static uint32_t counter_renesas_ra_agt_get_freq(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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timer_info_t info;
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fsp_err_t err;
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err = R_AGT_InfoGet(&data->agt_ctrl, &info);
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if (err != FSP_SUCCESS) {
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LOG_DBG("Counter get freq failed");
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return -EIO;
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}
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return info.clock_frequency;
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}
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static int counter_renesas_ra_agt_init(const struct device *dev)
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{
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const struct counter_renesas_ra_agt_config *cfg = dev->config;
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struct counter_renesas_ra_agt_data *data = dev->data;
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fsp_err_t err;
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err = R_AGT_Open(&data->agt_ctrl, &data->agt_cfg);
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if (err != FSP_SUCCESS) {
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return -EIO;
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}
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if (data->agtcmai_irq != BSP_IRQ_DISABLED) {
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R_FSP_IsrContextSet(data->agtcmai_irq, &data->agt_ctrl);
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}
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cfg->irq_config_func();
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return 0;
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}
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static void counter_renesas_ra_agt_agti_isr(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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counter_top_callback_t cb = data->top_cb;
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void *usr_data = data->top_data;
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if (cb != NULL) {
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cb(dev, usr_data);
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}
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agt_int_isr();
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}
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static void counter_renesas_ra_agt_agtcmai_isr(const struct device *dev)
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{
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struct counter_renesas_ra_agt_data *data = dev->data;
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counter_alarm_callback_t cb = data->alarm_cb;
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void *usr_data = data->alarm_data;
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uint32_t now;
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if (cb != NULL) {
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data->alarm_cb = NULL;
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data->alarm_data = NULL;
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if (counter_renesas_ra_agt_get_value(dev, &now) != 0) {
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LOG_DBG("Error in counter alarm");
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return;
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}
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cb(dev, 0, now, usr_data);
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}
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agtcmai_isr();
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}
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static DEVICE_API(counter, agt_renesas_ra_driver_api) = {
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.start = counter_renesas_ra_agt_start,
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.stop = counter_renesas_ra_agt_stop,
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.get_value = counter_renesas_ra_agt_get_value,
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.set_alarm = counter_renesas_ra_agt_set_alarm,
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.cancel_alarm = counter_renesas_ra_agt_cancel_alarm,
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.set_top_value = counter_renesas_ra_agt_set_top_value,
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.get_pending_int = counter_renesas_ra_agt_get_pending_int,
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.get_top_value = counter_renesas_ra_agt_get_top_value,
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.get_freq = counter_renesas_ra_agt_get_freq,
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.get_guard_period = counter_renesas_ra_agt_get_guard_period,
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.set_guard_period = counter_renesas_ra_agt_set_guard_period,
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};
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|
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#define TIMER(idx) DT_INST_PARENT(idx)
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|
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#define EVENT_AGT_INT(channel) BSP_PRV_IELS_ENUM(CONCAT(EVENT_AGT, channel, _INT))
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#define EVENT_AGT_COMPARE_A(channel) BSP_PRV_IELS_ENUM(CONCAT(EVENT_AGT, channel, _COMPARE_A))
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|
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#define AGT_IRQ_GET_BY_NAME(inst, name, cell) \
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COND_CODE_1(DT_IRQ_HAS_NAME(TIMER(inst), name), (DT_IRQ_BY_NAME(TIMER(inst), name, cell)), \
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((IRQn_Type) BSP_IRQ_DISABLED))
|
|
|
|
#define AGT_IRQ_CONFIG(inst, name, event, isr) \
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IF_ENABLED(DT_IRQ_HAS_NAME(TIMER(inst), name), \
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|
(R_ICU->IELSR[DT_IRQ_BY_NAME(TIMER(inst), name, irq)] = event; \
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|
IRQ_CONNECT(DT_IRQ_BY_NAME(TIMER(inst), name, irq), \
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|
DT_IRQ_BY_NAME(TIMER(inst), name, priority), \
|
|
isr, DEVICE_DT_INST_GET(inst), 0); \
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|
irq_disable(DT_IRQ_BY_NAME(TIMER(inst), name, irq));))
|
|
|
|
#define COUNTER_AGT_DEVICE_INIT(inst) \
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static void counter_renesas_ra_agt##inst##_irq_config_func(void) \
|
|
{ \
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|
AGT_IRQ_CONFIG(inst, agti, EVENT_AGT_INT(DT_PROP(TIMER(inst), channel)), \
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|
counter_renesas_ra_agt_agti_isr); \
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|
AGT_IRQ_CONFIG(inst, agtcmai, EVENT_AGT_COMPARE_A(DT_PROP(TIMER(inst), channel)), \
|
|
counter_renesas_ra_agt_agtcmai_isr); \
|
|
} \
|
|
\
|
|
struct counter_renesas_ra_agt_config counter_renesas_ra_agt_config##inst = { \
|
|
.info.max_top_value = \
|
|
DT_PROP(TIMER(inst), renesas_resolution) >= 32 \
|
|
? UINT32_MAX \
|
|
: BIT_MASK(DT_PROP(TIMER(inst), renesas_resolution)), \
|
|
.info.flags = (uint8_t)0U, \
|
|
.info.channels = 1, \
|
|
.irq_config_func = counter_renesas_ra_agt##inst##_irq_config_func, \
|
|
}; \
|
|
\
|
|
static struct counter_renesas_ra_agt_data counter_renesas_ra_agt_data##inst = { \
|
|
.agt_cfg = \
|
|
{ \
|
|
.mode = TIMER_MODE_PERIODIC, \
|
|
.period_counts = DT_PROP(TIMER(inst), renesas_resolution) >= 32 \
|
|
? UINT32_MAX \
|
|
: BIT_MASK(DT_PROP(TIMER(inst), \
|
|
renesas_resolution)), \
|
|
.source_div = DT_PROP(TIMER(inst), renesas_prescaler), \
|
|
.channel = DT_PROP(TIMER(inst), channel), \
|
|
.cycle_end_irq = AGT_IRQ_GET_BY_NAME(inst, agti, irq), \
|
|
.cycle_end_ipl = AGT_IRQ_GET_BY_NAME(inst, agti, priority), \
|
|
.p_extend = &counter_renesas_ra_agt_data##inst.agt_extend_cfg, \
|
|
}, \
|
|
.agt_extend_cfg = \
|
|
{ \
|
|
.count_source = DT_STRING_TOKEN_OR( \
|
|
TIMER(inst), renesas_count_source, AGT_CLOCK_LOCO), \
|
|
.agtoab_settings_b.agtoa = AGT_PIN_CFG_DISABLED, \
|
|
.agtoab_settings_b.agtob = AGT_PIN_CFG_DISABLED, \
|
|
.agto = AGT_PIN_CFG_DISABLED, \
|
|
.measurement_mode = AGT_MEASURE_DISABLED, \
|
|
.agtio_filter = AGT_AGTIO_FILTER_NONE, \
|
|
.enable_pin = AGT_ENABLE_PIN_NOT_USED, \
|
|
.trigger_edge = AGT_TRIGGER_EDGE_RISING, \
|
|
}, \
|
|
.agtcmai_irq = AGT_IRQ_GET_BY_NAME(inst, agtcmai, irq), \
|
|
.agtcmai_ipl = AGT_IRQ_GET_BY_NAME(inst, agtcmai, priority), \
|
|
.guard_period = 0, \
|
|
}; \
|
|
\
|
|
DEVICE_DT_INST_DEFINE(inst, counter_renesas_ra_agt_init, NULL, \
|
|
&counter_renesas_ra_agt_data##inst, \
|
|
&counter_renesas_ra_agt_config##inst, POST_KERNEL, \
|
|
CONFIG_COUNTER_INIT_PRIORITY, &agt_renesas_ra_driver_api);
|
|
|
|
DT_INST_FOREACH_STATUS_OKAY(COUNTER_AGT_DEVICE_INIT)
|