Allows enabling the Clock Recovery System (CRS) for HSI48 to achieve the expected accuracy for USB transfers. Uses USB SOF packet by default. Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
34 lines
815 B
C
34 lines
815 B
C
/*
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*
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* Copyright (c) 2023 Benjamin Björnsson <benjamin.bjornsson@gmail.com>.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <soc.h>
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#include <stm32_ll_bus.h>
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#include <stm32_ll_crs.h>
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#include <stm32_ll_rcc.h>
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#include <stm32_ll_utils.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/drivers/clock_control/stm32_clock_control.h>
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#include "clock_stm32_ll_common.h"
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/**
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* @brief Activate default clocks
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*/
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void config_enable_default_clocks(void)
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{
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/* Enable the power interface clock */
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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#if IS_ENABLED(STM32_HSI48_CRS_USB_SOF)
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CRS);
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LL_CRS_SetSyncSignalSource(LL_CRS_SYNC_SOURCE_USB);
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LL_CRS_EnableAutoTrimming();
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LL_CRS_EnableFreqErrorCounter();
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#endif
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}
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