Wilfried Chauveau 3e6dd56133 arch: arm: cortex_m: make reading tls pointer faster on v7m and v8m.main ... Encoding T3 allows for an offset of up to 12bits in size allowing for a single instruction instead of 3. Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>		2025-02-08 10:09:10 +01:00
..
cortex_a_r	Revert "arch: deprecate _current"	2025-01-10 07:49:08 +01:00
cortex_m	arch: arm: cortex_m: make reading tls pointer faster on v7m and v8m.main	2025-02-08 10:09:10 +01:00
mmu	arch: arm: mmu: Make all device memory shareable	2025-01-28 09:51:21 +01:00
mpu	arch: arm: fix mpu compiler warnings	2025-02-06 03:15:48 +01:00
offsets	arch: arm: cortex_m: pm_s2ram: add support for all architectures	2024-11-16 14:00:44 -05:00
__aeabi_atexit.c
CMakeLists.txt
elf.c	llext: Move arm-specific relocation names from generic LLEXT file	2024-09-12 14:48:55 +02:00
fatal.c	coredump: ARM: Ensure sp in dump is set as gdb expects	2024-11-06 10:17:59 -08:00
gdbstub.c
header.S
irq_offload.c	arch: initialize irq_offload during boot, do not use SYS_INIT	2024-09-17 20:05:22 -04:00
Kconfig	arch: arm: do not enable PLATFORM_SPECIFIC_INIT if SOC_RESET_HOOK=y	2024-09-16 15:12:18 -04:00
Kconfig.vfp
nmi_on_reset.S
nmi.c
swi_tables.ld
tls.c
userspace.S
vector_table.ld
zimage_header.ld