This test was written to idle for exactly 1ms and wake up with zero
error, which is just too tight for some platforms (and worked on
emulators where the tick rate is 10x coarser only because 0 == 0!).
And it's not clear that it's testing anything we promise in
documentation, regardless. Early wakeups are not an error and
absolutely not disallowed, yet the test is treating the wakeup like a
sleep.
Clean it up a bit and relax the tolerance to what we can compute
reliably: do all the math in ticks, idle for 10ms (i.e. longer than a
host quantum for emulators), and allow 1 tick of slop on either side to
permit slightly early wakeups while still verifying that "yes, the idle
did idle".
Fixes#46641
Signed-off-by: Andy Ross <andyross@google.com>
Update test suite to leverage new ZTEST APIs.
TEST=twister -T tests/drivers/watchdog/wdt_basic_api # Only build
Signed-off-by: Aaron Massey <aaronmassey@google.com>
get_version_check will leave the version info unchanged if osKernelGetInfo
fails. This lead to a compiler warning when those results were used.
Initialize the values with data that will cause a failure that should be
easily diagnosed.
Signed-off-by: Keith Packard <keithp@keithp.com>
Now that picolibc's malloc arena configuration always allocates
some space, we don't need explicit allocations for tests.
Signed-off-by: Keith Packard <keithp@keithp.com>
Now that picolibc's malloc arena configuration always allocates
some space, we don't need explicit allocations for tests.
Signed-off-by: Keith Packard <keithp@keithp.com>
Now that picolibc's malloc arena configuration always allocates
some space, we don't need explicit allocations for tests.
Signed-off-by: Keith Packard <keithp@keithp.com>
Now that picolibc's malloc arena configuration always allocates
some space, we don't need explicit allocations for tests.
Signed-off-by: Keith Packard <keithp@keithp.com>
When running with picolibc, we need more MPU resources for these
tests. Get rid of picolibc malloc arena too.
Signed-off-by: Keith Packard <keithp@keithp.com>
We're not quite sure how much extra stack space picolibc will use, so
give it plenty of space for now.
Signed-off-by: Keith Packard <keithp@keithp.com>
Extend test suite to validate zero copy API.
Add stress tests.
Add support for cache in the test. Test is not emulating cache
but ensures that buffer works correctly with cache enabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added functions which allow to use zero copy model for handling
data within the packet buffer.
Additionally, added handling of cache by adding option to keep rd_idx
in different cache line than wr_idx and data.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
It takes more than 300 seconds to finish the test,
so enlarge the timeout value from 300 to 500(seconds)
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
Updates the API and types to match updated I2C terminology. Replaces master
with controller and slave with target.
Updates all drivers to match the changed macros, types, and API signatures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Fix the deprecated calls to loading ZephyrUnittest by replacing them
with `Zephyr COMPONENTS unittest`.
Signed-off-by: Yuval Peress <peress@google.com>
As with previous commit, make the timer irq a simple integer variable
exported by the timer driver for the benefit of this one test
(tests/kernel/context).
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This test has gotten out of control. It has a giant #if cascade
enumerating every timer driver in the Zephyr tree and extracting its
interrupt number. Which means that every driver needs to somehow
expose that interrupt in its platform headers or some other API.
Make it a simple integer variable exported by the timer driver for the
benefit of this one test.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The pausing and timing of data transmission is changed in the PHY update
procedure, so that conformance tests passes. This requires an update
in unittests as well
Signed-off-by: Andries Kruithof <andries.kruithof@nordicsemi.no>
The BT_CODEC_LC3_CONFIG_* macros had a hardcoded location
and context, which makes them a lot less usable.
Updates the macro, and the macros that used them.
This also removes the BT_CODEC_LC3_CONFIG and instead
just uses the BT_CODEC_LC3_CONFIG_N macro, which has
then been renamed to BT_CODEC_LC3_CONFIG.
As an addition, the macros and their input has
also been better documented.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
These tests work in tandem with the cavstool.py script: the script
receives IPC messages and properly acts on them. However, it may take
some time to the script execution arrive at the point in which it's
ready to receive incoming messages. This patch makes the test code wait
some arbitrary time to allow the script to reach the desired state.
Note that another IPC message could be used to this end, but since some
tests are actually testing the IPC mechanism, it seems unwise to assume
IPC works for set up steps.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Schedules I/O chains in the same order as they arrive providing a fixed
amount of concurrency. The low memory cost comes at the cost of some
computational cost that is likely to be acceptable with small amounts
of concurrency.
The code cost is about 4x higher than the simple linear executor
which isn't entirely unexpected as the logic requirements are quite a bit
more than doing the next thing in the queue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
A DMA friendly Stream API for zephyr. Based on ideas from io_uring
and iio, a queue based API for I/O operations.
Provides a pair of fixed length ringbuffer backed queues for submitting
I/O requests and recieving I/O completions. The requests may be chained
together to ensure the next operation does not start until the current
one is complete.
Requests target an abstract rtio_iodev which is expected to wrap all
the hardware particulars of how to perform the operation. For example
with a SPI bus device, a description of what a read, and write mean
can be decided by the iodev wrapping a particular device
hanging off of a SPI controller.
The queue pair are submitted to an executor which may be a simple
inplace looping executor done in the callers execution context
(thread/stack) but other executors are expected. A threadpool executor
might for example allow for concurrent request chains to execute in
parallel. A DMA executor, in conjunction with DMA aware iodevs
would allow for hardware offloading of operations going so far as to
schedule with priority using hardware arbitration.
Both the iodev and executor are definable by a particular
SoC, meaning they can work in conjuction to perform IO operations
using a particular DMA controller or methodology if desired.
The application decides entirely how large the queues are, where
the buffers to read/write come from (some executors
may have particular demands!), and which executor to submit
requests to.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The test_adc.c still have hardcoded information on a board basis,
that need to be added manually.
Signed-off-by: Steffen Jahnke <steffen.jahnke@eu.panasonic.com>
This test is based on the wrong assumption that the IRQ vector table
symbols are always placed by the linker script also when
CONFIG_GEN_IRQ_VECTOR_TABLE is not actually set.
This is of course broken with the reworked mechanism of the IRQ vector
table placement.
Fix the test by reintroducing the old behaviour by forcefully
reinstating the symbols in the linker script.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
STM32_DT_CLOCKS was designed to take a device tree node label name as
argument: STM32_DT_CLOCKS(uart1)
Change its implementation to take a node identifier instead:
STM32_DT_CLOCKS(DT_NODELABEL(uart1)).
This make its usage more flexible since the argument can now be extracted
from other DT macros such as DT_PARENT. Then, the following can be done:
STM32_DT_CLOCKS(DT_PARENT(child_node_label)).
Since it is now possible implement STM32_DT_INST_CLOCKS using
STM32_DT_CLOCKS.
Finally, update existing STM32_DT_CLOCKS users and convert
STM32_INST_CLOCK_INFO users to STM32_CLOCK_INFO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
