DDR50/DDR52 modes should use PINCTRL_STATE_SLOW (50MHz), so the lack of a
break statement after enabling DDR mode is expected. Add an explicit
__fallthrough to resolve the issue flagged by coverity scan
Fixes#65324
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Explicitly set host_io fields, instead of using memset(). This way the
fields should have values that are defined in the enum types for each
field.
Fixes#63130
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The plic has a very simple mechanism to claim an interrupt as well as to
complete and clear it. The same register is read from/ written to to
achieve this.
Get the ID of the HART that serviced the interrupt and write to the
claim complete register in the correct context
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
The plic uses contexts to seperate irq enables, threshold priority and
claim complete registers from each core for a given platform. As well as
this, each privilege level has its own context.
for multi-core platform's, we need to be able to enable/ disable a
global interrupt for all the cores that are associated with Zephyr.
To do this, we need to make some assumptions:
1. The privilege contexts are contiguous
2. M mode context is first, followed by S mode.
We know how many cpus are used in an application and each cpu's hartid,
thanks to some very handy inline functions. So we iterate through each
cpu and use the hartid of a cpu in the calculation of the context.
While we are at it, In an effort to make the driver more readable,
allign with the macro naming convention outlined in Linux's PLIC driver
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
With low LPTIM freq when prescaler is set to 16 or 32,
the CONFIG_SYS_CLOCK_TICKS_PER_SEC must be reduced to
LPTIM CLOCK_/prescaler to avoid spurious timer wakeup activity.
Assert error if the CONFIG_SYS_CLOCK_TICKS_PER_SEC
is not compatible with the lptim clock freq.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Rename to LPTIM_PRESCALER, the <st,property> prescaler of
the stm32 LPTimer. This commit gives better readability than
LPTIM_CLOCK_RATIO.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The commit fixes the SHA driver because the ROM API has the following
changes from ES to QS chip:
1. base addres: from 0x13c -> 0x148
2. required SHA context buffer size : from 228 -> 240 bytes
This change also adds a check for the pre-allocated buffer size of the
SHA context when the driver initiliazes.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Remove BT_SPI_BLUENRG Kconfig parameter as it is redundant according to
the new changes introduced by ST SPI protocol V1 and V2.
Remove "config BT_SPI_BLUENRG" from the boards that were using it.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Introduce STMicroelectronics SPI protocol V2 which is used in BlueNRG-1
and successor devices.
Change the size of the variable "size" to 16 bits as it is necessary for ST
BlueNRG-1 and successor devices.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Replace the header acquisition scope in bt_spi_send with bt_spi_get_header.
Add WRITE_DATA_CONDITION in order not to retransmit data without reading
the header as it is meaningless for ST BlueNRG devices.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Update structure of spi.c to have a better and cleaner separation
between STMicroelectronics and Zephyr SPI protocol.
Introduce bt_spi_get_header to separate algorithms well for
header acquisition in different protocols.
Remove header acquisition from bt_spi_rx_thread to make it simpler.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Multilevel interrupt configs are leaking into every single build without
this option being enabled, so guard the Kconfig and include files to
avoid this.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add support for uc8175 display driver. uc8175 has a slightly
different command/data length requirements for certain registers,
namely TRES and PTL, compared to uc8176/uc8179
This commit refactors the driver code and such that setting TRES and PTL
registers are now done by function pointers provided by config->quirks,
by the same token as how it is done for setting CDI register
Signed-off-by: Xiao Qin <xiaoq@google.com>
Configure to grant SI permissions to allow to set MAC,
update hash filter table and promiscuous multicast.
Fixes#66198
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
- Allow non RTIO i2c drivers to be intermixed with RTIO drivers
- Remove reference to rtio_spsc_drop_all()
- Fix impllicit cast which throws an error with more restrictive
compile flags
Signed-off-by: Yuval Peress <peress@google.com>
Ambiq UART requires specific busy wait during initialization for
propagating powering control registers, original k_busy_wait()
used here generated a dead loop because k_busy_wait() relays on
timer, who's driver is initialized after UART(UART init in
PRE_KERNEL_1, timer init in PRE_KERNEL_2), replace k_busy_wait()
with checking power status register is more suitable here.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
Automatic Wi-Fi station reconnection is forced even when
application requests disconnection. This PR adds a check
in the disconnection event reason to decide whether or not
perform the reconnection.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
As the display API now check against valid callback functions and
returns -ENOSYS (or equalent), there is no need to provide
such functions in the driver code
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
The FTM counter modulo register (MOD) holds a 16-bit value, but PWM
set_cycles API allows to set 32-bit cycles values.
Fixes#66226
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Fix error writing to the CR register on the first call to SPI configure on
NXP MKE1xF. On the first call, the module clock is not enabled and writing
to the CR register will fail.
Fixes: #66036
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The DMA channel data structure can retain config information.
We need to clear this everytime dma_configure is called on a
channel.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Need to do the ENET module-level clock initialization from zephyr
instead of MCUX HAL, because now there are multiple zephyr drivers with
different init priorities that rely on the module being clocked. MDIO
must be initialized before the ENET MAC, and the MAC driver currently
calls ENET_Init from the HAL to initialize the clock, but MDIO needs the
module clock enabled first on some platforms. So replace the MAC init
with ENET_Up from the HAL, which doesn't include clock init, then do
clock init from a higher priority sys init based on the parent
compatible.
Also, add support for enet clock ungating with clock_control_on on ccm
driver do this with current platforms supported.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
- PHY can be set up as rmii but still use 25 MHz MDC, add DT property
value for this case
- Fix KSZ8081 driver spamming phy status in debug level logging,
and fix some other state/logging logic
- Fix PHY driver not rescheduling monitor work if first configuration
fails, change code path to use goto for errors
- Handle case where some phys are not using the gpio pins in phy driver
Make GPIO properties of ksz8081 phy optional since these hardware pins
may be unused on some boards
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the handler of SI Rx event within
the shim driver itself.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Remove the functions linux_socketcan_setsockopt() and
linux_socketcan_getsockopt() as they are unused.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
During init i2c_ambiq device, the bitrate calculation is not correct,
results in incorrect device speed, or failed to configure i2c device
if clock-frequency is set to higher than I2C_BITRATE_STANDARD
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
Add a "input kbd_matrix_state" shell command. This prints the state of
a keyboard matrix in a much more compact representation than the normal
input event dump, but also keeps track of any key seen during the
execution and reports that on the "off" command. The output can be used
to help setting the actual-key-mask property.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Define the edge-trigger register base address based on whether
the PLIC node in the devicetree has an additional compatible
that supports edge-triggered interrupt.
Limited the implementation to Andes NCEPLIC100 only, updated
the devicetree binding of `andes_v5_ae350` accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Do not allow the modem to sleep if the driver is busy.
Fix CTS filtering. Ignore small pulses on the CTS line.
Fix socket restoration. Restored sockets could be mismatched
with a wrong type.
UDP sockets could be duplicated during restore.
Improve IO debug mode. Use warning message for IO debug mode
to easily see IO transitions color coded in a terminal.
Ensure the UART is enabled whenever the driver needs to send
commands to the modem.
Ensure DNS resolver is re-initialized after the modem is powered off.
PROD-307
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
There is reverted CPA check condition in routines:
dai_ssp_pm_runtime_en_ssp_power()
dai_ssp_pm_runtime_dis_ssp_power()
In result disable always timeouts while enable returns before
CPA bit set. This cause sporadic exceptions on HW.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Change the gpio_kbd_matrix_set_detect_mode to skip setting gpio
interrupts if we don't have callbacks configured. This is the case if
the driver is running in poll or scan mode.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The address of most of the registers defined in
the driver are wrong. This fixes it, following
the correct numbering as can be found in the
device's datasheet. Moreover, re-grouping of
the macros according to their functionality.
Signed-off-by: Nikos Agianniotis <na@neq.dk>
In the kconfig descriptions and the links to documents
replace native_posix with native_sim, or a generally
applicable description.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Use native_sim in the help messages platforms examples
instead of native_posix.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
As the display API now check against valid callback functions and
returns -ENOSYS (or equalent), there is no need to provide
such functions in the driver code.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Update the Kconfig for the npcx eSPI driver so it's automatically
enabled if the devicetree node is enabled.
Signed-off-by: Keith Short <keithshort@google.com>
Update the Kconfig for the it8xxx2 eSPI driver so it's automatically
enabled if the devicetree node is enabled.
Signed-off-by: Keith Short <keithshort@google.com>
Add code to configure and program Lcu, Trgmux and Emios_Icu IPs to
get the the rotations by the motor in radians.
Co-authored-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Co-authored-by: Mayank Mahajan <mayankmahajan.x@nxp.com>
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
`pm_device_runtime_get` and `pm_device_runtime_put` have returned `0`
when device runtime PM is not enabled since #56222. Manually checking
the state is no longer required.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Xtensa simulator console should not be enabled when the target is using
winstream console, otherwise we will have multiple definitions of the
same function.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Enforcing the peer's behavior is not strictly necessary. All the host
should do is make sure it is resilient to a spec-violating peer.
Moreover, a growing number of platforms were disabling the check, as the
spec allows "batching" HCI num complete packets events, stalling ATT RX.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
Co-authored-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
