- The MX25UM51345G flash is connected to FLEXSPI PortA for
mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
This includes a basic driver for built-in flash on the Texas Intruments
SimpleLink CC13xx/CC26xx SoC series.
The driver makes use of driverlib HAL from TI's SDK and was tested on
two LaunchXL development boards with CC1352R and CC2652R SoCs:
- CC1352R1 LaunchXL
- CC26x2R1 LaunchXL
Tests were done using:
- flash shell sample (samples/drivers/flash_shell)
- littlefs filesystem sample (samples/subsys/fs/littlefs)*
- MCUboot (bootloader/mcuboot/boot/zephyr)*
* additional changes in DTS for the boards were required (partitions
table) and are not part of this changeset (will be introduced later)
Some additional information about the implementation:
1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
"An individual 64-bit word can be programmed to change bits 1 to 0"
but it seems this 'alignment' requirement is handled internally by
the ROM function and thus 'write-block-size' is set to 1.
2. Interrupts, VIMS and line buffers are disabled during flash content
update (write or erase) and restored afterwards as recommended by TI.
3. Only RAM to flash write is supported (source of data to be written to
flash can't point to flash).
4. The driver doesn't take care of flash sector protection disable as
that functionality is handled by CCFG. Write or erase requests which
refer to a protected area will fail.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
anomaly_122_init() and anomaly_122_uninit() procedures implement
proper activate and deactivate procedures which are required for
achieve low power consumption.
The real workaround for the anomaly is buried inside hal function
nrf_qspi_disable() is called indirectly by the anomaly_122_uninit().
Therefore anomaly_122_init/uninit should be called for any
nrf QSPI device.
This patch renames functions and make call to them mandatory.
This fixes increased power consumtion issue on nRF53 device when
qspi was used.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The flash_stm32_write_range() function of the STM32H7x flash
driver partially uses a wrong flash program word size for certain
SOC types when calculating the flash write offset. If the used
SOC is not having a flash program word size of 256 bits / 32 bytes
the written data might get corrupted, as the flash write offset
value does not match the number of bytes that were actually
written.
Fixes#45568
Signed-off-by: Christoph Heller <chris@metanetics.de>
There is no need in the `flag_quad_io_en` field.
When QE enabling failed, then the driver `init` fails as well.
There is no way to use qspi in quad mode if qe is not enabled.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support for 1-4-4 and 1-1-4 read modes.
SFDP is used to query for available read instructions, then the
fastest one is used.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
* Renames 4PP define to PP_1_4_4
* Adds PP_1_1_4 define
That matches linux kernel defines a bit more.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Simplifies the driver and Gives a generic function to prepare the Regular
commands for each instruction.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the stm32 octospi driver based on the exisitng quadspi
for stm32 devices and source code from the STM32Cube.
This drivers initialized the peripheral and the NOR memory
in SPI or OctoSPI mode with STR or DTR data Transfer rates.
The NOR-flash can provide the SDFP table directly (if supported)
or through the DeviceTree.
Limitation: no DMA transfer.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the introduction of the OSPI NOR flash controller
more octal commands and parameters are defined.
It completes the existing SPI commands
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not default FLASH_MCUX_FLEXSPI_XIP to enabled when code is not
located in flash, this will cause issues if code is executing from ITCM,
as the zephyr_code_relocate macro will relocate the flash driver code
into itcm, and overwrite the zephyr image.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move all device data to RAM. Since the flexspi driver accesses the
flash device that is being used for XIP, various RWW hazards can occur
if the flexspi driver is interacting with the flash device, while
running in XIP mode.
Fixes#45182
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This modification is required to enable flash encryption.
Using hal implementation of spi_flash calls maintains
compability amongs different socs while offering
latest esp-idf enhancements.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a check to avoid invalidating the cache when the latter is disabled.
Indeed, doing so can lead to a bus fault.
Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
redefine all the stm32 flash register bit Name from
FLASH_NSCR_xxx to FLASH_STM32_FLASH_NSCR_xxx
in all the zephyr drivers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds the stm32u5 flash controller driver for this serie
to the existing stm32l5 flash driver part
Only 1 or 2 MB devices exist today (4MB is possible in the future).
This flash controller driver is adapted from the flash_stm32l5.c
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the stm32U5 soc family to the flash driver
The flash controller has particular register names in the Non-Secure
area to be adapted for the driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The cmd_write contains write verification that compares what has
been written with what it can read; the flash read operation
status was not checked which means that the bus or communication
problem was reported the same way as malformed write.
There have also been some optimization done by removal
of multiplications.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit changes default buffer size for flash write operations
to be CONFIG_SHELL_ARGC_MAX dependent; there is no point to define
buffer longer than number of write bytes that will be extracted
from command line arguments.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Store an optional reference to the zephyr,flash-controller choice. If
available and no user input is provided, it will be used as the default
flash device. If not available, error message will be more explicit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for S2B1 quad-enable-requirements.
Add wrsr call for various QER modes
S2B1v6 mode tested with Winbond W25Q128JV series and pp4o and read4io
commands.
Signed-off-by: Zack Cornelius <zcornelius@securityesys.com>
Added basic support for enter 4-byte addressing command.
Patch supports command 0xB7 (Enter 4-Byte Address Mode),
with or without preceding WREN.
Similar as for SPI-NOR the `enter-4byte-addr` property of
memory node is used or describing how to Enter 4-Byte Addressing
mode.
Worth to notice that along with that property the `address-size-32`
property is expected as it switch the driver to use 4-byte addressing
in operations.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The Kconfig function "dt_node_has_prop" was using label as its
parameter, where other functions use either chosen or path.
The documentation says that the parameter is path, so this patch
makes the function as documentation says and as other functions
in the file.
The additional nodelabel functions were added as counterparts that
are using nodes labels instead of paths.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
If a user has a 1GB external flash it is currently not possible
to configure this through DTS. To allow for such a configuration
we add an option which specifies the size in bytes not bits.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section. Move
device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Extend the macro with checks for DT properties related to pin
assignments that are defined but would be ignored, depending on
whether PINCTRL is enabled or not, what presumably indicates
a resulting configuration different from what the user expects.
Add also a possibility to indicate that the pinctrl-1 property
should not be checked because the caller does not support the
sleep state.
Rename the macro so that its name better reflects its function.
Update accordingly all drivers that use it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
A nordic hal update was made around the same time that anomaly 122 on
nrf52840 was fixed. This update introduced qspi_pins_deconfigure() in
the nrfx_qspi_uninit(). With that, the CS pin from QSPI becomes a
floating pin after anomaly 122 uninit is executed.
Set the CS pin high after the uninit to fix this.
I'm assuming that floating CS pins that are likely to experience EMI
can impact power consumption. That was the case with my custom board.
My custom board with nrf52840 and MX25R3235F running the hello_world
sample was consuming 2.3 mA before this patch, and 30 uA after
applying it.
Signed-off-by: Rodrigo Brochado <git.rodrigobrochado@gmail.com>
This API has be removed in Zephyr 2.8, and does not need to be used
as a static function. Because flash_it8xxx2_write_protection(false)
is not supported. If the IT83XX_GCTRL_EPLR register in the
flash_it8xxx2_write_protection(false) is written as 1, the flash
write region will not be protected later, only be cleared by
power-on reset.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Just use dev->name. This change follow same principles applied when
DEV_CFG and DEV_DATA macros were removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for the new pinctrl API to the nRF QSPI NOR flash driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
